c3344b626d
While all of MMX, SSE, and SSE2 are included in "generic64", they can be individually disabled. There are two MOVQ forms lacking respective attributes. While the MMX one would get refused anyway (due to MMX registers not recognized with .nommx), the assembler did happily accept the SSE2 form. Add respective CPU settings to both, paralleling what the MOVD counterparts have.
16 lines
361 B
Plaintext
16 lines
361 B
Plaintext
.*: Assembler messages:
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.*:6: Error: .*paddb.*
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.*:7: Error: .*movq.*
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.*:8: Error: .*movq.*
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GAS LISTING .*
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#...
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[ ]*1[ ]+\# Test \.arch \.nosse2
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[ ]*2[ ]+\.text
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[ ]*3[ ]+\.arch generic64
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[ ]*4[ ]+\.arch \.nosse2
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[ ]*5[ ]+\?\?\?\? 0F58C0 addps %xmm0, %xmm0
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[ ]*6[ ]+paddb %xmm0, %xmm0
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[ ]*7[ ]+movq %xmm0, %rax
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[ ]*8[ ]+movq %rax, %xmm0
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#pass
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