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8sa1-binutils-gdb/opcodes
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Nelson Chu 3d73d29e4e RISC-V: Add bfd/cpu-riscv.h to support all spec versions controlling. 
Make the opcode/riscv-opc.c and include/opcode/riscv.h tidy, move the
spec versions stuff to bfd/cpu-riscv.h.  Also move the csr stuff and
ext_version_table to gas/config/tc-riscv.c for internal use.  To avoid
too many repeated code, define general RISCV_GET_SPEC_NAME/SPEC_CLASS
macros.  Therefore, assembler/dis-assembler/linker/gdb can get all spec
versions related stuff from cpu-riscv.h and cpu-riscv.c, since the stuff
are defined there uniformly.

bfd/
    * Makefile.am: Added cpu-riscv.h.
    * Makefile.in: Regenerated.
    * po/SRC-POTFILES.in: Regenerated.
    * cpu-riscv.h: Added to support spec versions controlling.
    Also added extern arrays and functions for cpu-riscv.c.
    (enum riscv_spec_class): Define all spec classes here uniformly.
    (struct riscv_spec): Added for all specs.
    (RISCV_GET_SPEC_CLASS): Added to reduce repeated code.
    (RISCV_GET_SPEC_NAME): Likewise.
    (RISCV_GET_ISA_SPEC_CLASS): Added to get ISA spec class.
    (RISCV_GET_PRIV_SPEC_CLASS): Added to get privileged spec class.
    (RISCV_GET_PRIV_SPEC_NAME): Added to get privileged spec name.
    * cpu-riscv.c (struct priv_spec_t): Replaced with struct riscv_spec.
    (riscv_get_priv_spec_class): Replaced with RISCV_GET_PRIV_SPEC_CLASS.
    (riscv_get_priv_spec_name): Replaced with RISCV_GET_PRIV_SPEC_NAME.
    (riscv_priv_specs): Moved below.
    (riscv_get_priv_spec_class_from_numbers): Likewise, updated.
    (riscv_isa_specs): Moved from include/opcode/riscv.h.
    * elfnn-riscv.c: Included cpu-riscv.h.
    (riscv_merge_attributes): Initialize in_priv_spec and out_priv_spec.
    * elfxx-riscv.c: Included cpu-riscv.h and opcode/riscv.h.
    (RISCV_UNKNOWN_VERSION): Moved from include/opcode/riscv.h.
    * elfxx-riscv.h: Removed extern functions to cpu-riscv.h.
gas/
    * config/tc-riscv.c: Included cpu-riscv.h.
    (enum riscv_csr_clas): Moved from include/opcode/riscv.h.
    (struct riscv_csr_extra): Likewise.
    (struct riscv_ext_version): Likewise.
    (ext_version_table): Moved from opcodes/riscv-opc.c.
    (default_isa_spec): Updated type to riscv_spec_class.
    (default_priv_spec): Likewise.
    (riscv_set_default_isa_spec): Updated.
    (init_ext_version_hash): Likewise.
    (riscv_init_csr_hash): Likewise, also fixed indent.
include/
    * opcode/riscv.h: Moved stuff and make the file tidy.
opcodes/
    * riscv-dis.c: Included cpu-riscv.h, and removed elfxx-riscv.h.
    (default_priv_spec): Updated type to riscv_spec_class.
    (parse_riscv_dis_option): Updated.
    * riscv-opc.c: Moved stuff and make the file tidy.
2021-02-18 15:09:16 +08:00
..
po
Updated translations for some subdirectories
2021-01-12 13:18:50 +00:00
.gitignore
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aarch64-asm-2.c
aarch64: Remove support for CSRE
2021-01-11 15:01:09 +00:00
aarch64-asm.c
Fix places in the AArch64 opcodes library code where a call to assert() has side effects.
2021-01-08 11:51:50 +00:00
aarch64-asm.h
Update year range in copyright notice of binutils files
2021-01-01 10:31:05 +10:30
aarch64-dis-2.c
aarch64: Remove support for CSRE
2021-01-11 15:01:09 +00:00
aarch64-dis.c
Fix places in the AArch64 opcodes library code where a call to assert() has side effects.
2021-01-08 11:51:50 +00:00
aarch64-dis.h
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2021-01-01 10:31:05 +10:30
aarch64-gen.c
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2021-01-01 10:31:05 +10:30
aarch64-opc-2.c
aarch64: Remove support for CSRE
2021-01-11 15:01:09 +00:00
aarch64-opc.c
aarch64: Remove support for CSRE
2021-01-11 15:01:09 +00:00
aarch64-opc.h
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2021-01-01 10:31:05 +10:30
aarch64-tbl.h
aarch64: Remove support for CSRE
2021-01-11 15:01:09 +00:00
aclocal.m4
Implement a workaround for GNU mak jobserver
2021-01-12 05:45:44 -08:00
alpha-dis.c
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2021-01-01 10:31:05 +10:30
alpha-opc.c
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arc-dis.c
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2021-01-01 10:31:05 +10:30
arc-dis.h
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2021-01-01 10:31:05 +10:30
arc-ext-tbl.h
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arc-ext.c
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arc-ext.h
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arc-fxi.h
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arc-nps400-tbl.h
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arc-opc.c
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arc-regs.h
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arc-tbl.h
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arm-dis.c
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avr-dis.c
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bfin-dis.c
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bpf-asm.c
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bpf-desc.c
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bpf-desc.h
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bpf-dis.c
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bpf-ibld.c
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bpf-opc.c
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bpf-opc.h
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cgen-asm.c
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cgen-asm.in
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cgen-bitset.c
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cgen-dis.c
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cgen-dis.in
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cgen-ibld.in
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cgen-opc.c
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2021-01-01 10:31:05 +10:30
cgen.sh
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ChangeLog
RISC-V: Add bfd/cpu-riscv.h to support all spec versions controlling.
2021-02-18 15:09:16 +08:00
ChangeLog-0001
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ChangeLog-0203
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ChangeLog-2004
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ChangeLog-2005
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ChangeLog-2006
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ChangeLog-2007
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ChangeLog-2008
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ChangeLog-2009
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ChangeLog-2010
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ChangeLog-2011
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ChangeLog-2012
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ChangeLog-2013
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ChangeLog-2014
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ChangeLog-2015
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ChangeLog-2016
PR27116, Spelling errors found by Debian style checker
2021-01-01 14:36:35 +10:30
ChangeLog-2017
…
ChangeLog-2018
ChangeLog rotation
2019-01-01 21:25:40 +10:30
ChangeLog-2019
ChangeLog rotation
2020-01-01 18:12:08 +10:30
ChangeLog-2020
ChangeLog rotation
2021-01-01 10:31:02 +10:30
ChangeLog-9297
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ChangeLog-9899
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config.in
…
configure
bfd, opcodes, libctf: support --with-included-gettext
2021-02-10 15:26:57 +00:00
configure.ac
bfd, opcodes, libctf: support --with-included-gettext
2021-02-10 15:26:57 +00:00
configure.com
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cr16-dis.c
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cr16-opc.c
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2021-01-01 10:31:05 +10:30
cris-dis.c
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2021-01-01 10:31:05 +10:30
cris-opc.c
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crx-dis.c
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crx-opc.c
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csky-dis.c
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csky-opc.h
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d10v-dis.c
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d10v-opc.c
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d30v-dis.c
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d30v-opc.c
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dep-in.sed
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dis-buf.c
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dis-init.c
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disassemble.c
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disassemble.h
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dlx-dis.c
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epiphany-asm.c
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epiphany-desc.c
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epiphany-desc.h
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2021-01-01 10:31:05 +10:30
epiphany-dis.c
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epiphany-ibld.c
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2021-01-01 10:31:05 +10:30
epiphany-opc.c
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epiphany-opc.h
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fr30-asm.c
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fr30-desc.c
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fr30-desc.h
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fr30-dis.c
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fr30-ibld.c
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2021-01-01 10:31:05 +10:30
fr30-opc.c
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2021-01-01 10:31:05 +10:30
fr30-opc.h
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2021-01-01 10:31:05 +10:30
frv-asm.c
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frv-desc.c
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frv-desc.h
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frv-dis.c
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2021-01-01 10:31:05 +10:30
frv-ibld.c
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2021-01-01 10:31:05 +10:30
frv-opc.c
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2021-01-01 10:31:05 +10:30
frv-opc.h
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2021-01-01 10:31:05 +10:30
ft32-dis.c
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2021-01-01 10:31:05 +10:30
ft32-opc.c
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2021-01-01 10:31:05 +10:30
h8300-dis.c
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hppa-dis.c
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2021-01-01 10:31:05 +10:30
i386-dis-evex-len.h
x86: simplify decode of opcodes valid with (embedded) 66 prefix only
2020-07-14 10:33:40 +02:00
i386-dis-evex-mod.h
x86: drop Rdq, Rd, and MaskR
2020-07-14 10:42:33 +02:00
i386-dis-evex-prefix.h
x86: drop Rdq, Rd, and MaskR
2020-07-14 10:42:33 +02:00
i386-dis-evex-reg.h
x86: simplify decode of opcodes valid with (embedded) 66 prefix only
2020-07-14 10:33:40 +02:00
i386-dis-evex-w.h
x86: drop Rdq, Rd, and MaskR
2020-07-14 10:42:33 +02:00
i386-dis-evex.h
x86: drop Rdq, Rd, and MaskR
2020-07-14 10:42:33 +02:00
i386-dis.c
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2021-01-01 10:31:05 +10:30
i386-gen.c
x86: have preprocessor expand macros
2021-02-16 11:27:40 +01:00
i386-init.h
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2021-01-01 10:31:05 +10:30
i386-opc.c
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2021-01-01 10:31:05 +10:30
i386-opc.h
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2021-01-01 10:31:05 +10:30
i386-opc.tbl
x86: CVTPI2PD has special behavior
2021-02-16 11:34:25 +01:00
i386-reg.tbl
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2021-01-01 10:31:05 +10:30
i386-tbl.h
x86: CVTPI2PD has special behavior
2021-02-16 11:34:25 +01:00
ia64-asmtab.c
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2021-01-01 10:31:05 +10:30
ia64-asmtab.h
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ia64-dis.c
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ia64-gen.c
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ia64-ic.tbl
…
ia64-opc-a.c
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ia64-opc-b.c
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ia64-opc-d.c
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ia64-opc-f.c
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ia64-opc-i.c
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ia64-opc-m.c
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ia64-opc-x.c
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ia64-opc.c
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ia64-opc.h
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ia64-raw.tbl
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ia64-war.tbl
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ia64-waw.tbl
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ip2k-asm.c
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ip2k-desc.c
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ip2k-desc.h
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ip2k-dis.c
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ip2k-ibld.c
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ip2k-opc.c
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ip2k-opc.h
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iq2000-asm.c
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iq2000-desc.c
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iq2000-desc.h
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iq2000-dis.c
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iq2000-ibld.c
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iq2000-opc.c
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iq2000-opc.h
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lm32-asm.c
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lm32-desc.c
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lm32-desc.h
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lm32-dis.c
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lm32-ibld.c
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lm32-opc.c
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lm32-opc.h
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lm32-opinst.c
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m32c-asm.c
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m32c-desc.c
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m32c-desc.h
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m32c-dis.c
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m32c-ibld.c
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m32c-opc.c
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m32c-opc.h
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m32r-asm.c
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m32r-desc.c
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m32r-desc.h
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m32r-dis.c
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m32r-ibld.c
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m32r-opc.c
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m32r-opc.h
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m32r-opinst.c
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m68hc11-dis.c
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m68hc11-opc.c
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m68k-dis.c
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m68k-opc.c
m68k: Require m68020up rather than m68000up for CHK.L instruction.
2021-01-07 14:45:10 +00:00
m10200-dis.c
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m10200-opc.c
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m10300-dis.c
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m10300-opc.c
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MAINTAINERS
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Makefile.am
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Makefile.in
Regen Makefile.in for jobserver.m4 aclocal.m4 dependency
2021-01-13 22:06:02 +10:30
makefile.vms
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mcore-dis.c
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mcore-opc.h
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mep-asm.c
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mep-desc.c
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mep-desc.h
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mep-dis.c
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mep-ibld.c
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mep-opc.c
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mep-opc.h
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metag-dis.c
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microblaze-dis.c
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2021-01-01 10:31:05 +10:30
microblaze-dis.h
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2021-01-01 10:31:05 +10:30
microblaze-opc.h
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microblaze-opcm.h
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2021-01-01 10:31:05 +10:30
micromips-opc.c
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2021-01-01 10:31:05 +10:30
mips16-opc.c
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mips-dis.c
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2021-01-01 10:31:05 +10:30
mips-formats.h
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mips-opc.c
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mmix-dis.c
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mmix-opc.c
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2021-01-01 10:31:05 +10:30
moxie-dis.c
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2021-01-01 10:31:05 +10:30
moxie-opc.c
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2021-01-01 10:31:05 +10:30
msp430-decode.c
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2021-01-01 10:31:05 +10:30
msp430-decode.opc
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msp430-dis.c
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2021-01-01 10:31:05 +10:30
mt-asm.c
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2021-01-01 10:31:05 +10:30
mt-desc.c
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2021-01-01 10:31:05 +10:30
mt-desc.h
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2021-01-01 10:31:05 +10:30
mt-dis.c
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mt-ibld.c
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2021-01-01 10:31:05 +10:30
mt-opc.c
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2021-01-01 10:31:05 +10:30
mt-opc.h
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2021-01-01 10:31:05 +10:30
nds32-asm.c
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2021-01-01 10:31:05 +10:30
nds32-asm.h
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nds32-dis.c
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nds32-opc.h
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nfp-dis.c
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2021-01-01 10:31:05 +10:30
nios2-dis.c
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nios2-opc.c
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ns32k-dis.c
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opc2c.c
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opintl.h
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or1k-asm.c
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2021-01-01 10:31:05 +10:30
or1k-desc.c
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or1k-desc.h
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or1k-dis.c
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or1k-ibld.c
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or1k-opc.c
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2021-01-01 10:31:05 +10:30
or1k-opc.h
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2021-01-01 10:31:05 +10:30
or1k-opinst.c
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2021-01-01 10:31:05 +10:30
pdp11-dis.c
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pdp11-opc.c
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pj-dis.c
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pj-opc.c
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ppc-dis.c
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2021-01-01 10:31:05 +10:30
ppc-opc.c
POWER10: Add Return-Oriented Programming instructions
2021-01-09 15:16:13 +10:30
pru-dis.c
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pru-opc.c
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riscv-dis.c
RISC-V: Add bfd/cpu-riscv.h to support all spec versions controlling.
2021-02-18 15:09:16 +08:00
riscv-opc.c
RISC-V: Add bfd/cpu-riscv.h to support all spec versions controlling.
2021-02-18 15:09:16 +08:00
rl78-decode.c
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2021-01-01 10:31:05 +10:30
rl78-decode.opc
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rl78-dis.c
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rx-decode.c
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rx-decode.opc
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rx-dis.c
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s12z-dis.c
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s12z-opc.c
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s12z-opc.h
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s390-dis.c
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s390-mkopc.c
IBM Z: Implement instruction set extensions
2021-02-15 14:32:17 +01:00
s390-opc.c
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s390-opc.txt
IBM Z: Implement instruction set extensions
2021-02-15 14:32:17 +01:00
score7-dis.c
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2021-01-01 10:31:05 +10:30
score-dis.c
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score-opc.h
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sh-dis.c
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sh-opc.h
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sparc-dis.c
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sparc-opc.c
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spu-dis.c
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spu-opc.c
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2021-01-01 10:31:05 +10:30
stamp-h.in
…
sysdep.h
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tic4x-dis.c
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tic6x-dis.c
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tic30-dis.c
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tic54x-dis.c
opcodes: tic54x: namespace exported variables
2021-02-08 18:26:08 -05:00
tic54x-opc.c
opcodes: tic54x: namespace exported variables
2021-02-08 18:26:08 -05:00
tilegx-dis.c
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tilegx-opc.c
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tilepro-dis.c
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tilepro-opc.c
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v850-dis.c
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v850-opc.c
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vax-dis.c
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visium-dis.c
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2021-01-01 10:31:05 +10:30
visium-opc.c
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2021-01-01 10:31:05 +10:30
wasm32-dis.c
read_leb128 overflow checking
2021-02-17 16:57:59 +10:30
xc16x-asm.c
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2021-01-01 10:31:05 +10:30
xc16x-desc.c
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xc16x-desc.h
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xc16x-dis.c
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xc16x-ibld.c
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xc16x-opc.c
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xc16x-opc.h
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2021-01-01 10:31:05 +10:30
xgate-dis.c
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2021-01-01 10:31:05 +10:30
xgate-opc.c
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xstormy16-asm.c
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2021-01-01 10:31:05 +10:30
xstormy16-desc.c
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xstormy16-desc.h
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xstormy16-dis.c
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xstormy16-ibld.c
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xstormy16-opc.c
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xstormy16-opc.h
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xtensa-dis.c
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2021-01-01 10:31:05 +10:30
z8k-dis.c
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z8k-opc.h
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z8kgen.c
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2021-01-01 10:31:05 +10:30
z80-dis.c
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2021-01-01 10:31:05 +10:30