Disallow PC relative for CMPI on MC68000/10
The MC68000/10 decodes the second operand of CMPI strictly as destination operand, which disallows PC relative addressing, even though the insn doesn't write to the operand. This restriction has only been lifted for the MC68020+ and CPU32. opcodes: PR 25848 * m68k-opc.c (m68k_opcodes): Allow pc-rel for second operand of cmpi only on m68020up and cpu32. gas: PR 25848 * testsuite/gas/m68k/operands.s: Add tests for cmpi. * testsuite/gas/m68k/operands.d: Update. * testsuite/gas/m68k/op68000.d: Update for new error messages.
This commit is contained in:
Andreas Schwab
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c36876fe5b
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bb2a145347
@ -1,3 +1,10 @@
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2020-04-21 Andreas Schwab <schwab@linux-m68k.org>
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PR 25848
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* testsuite/gas/m68k/operands.s: Add tests for cmpi.
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* testsuite/gas/m68k/operands.d: Update.
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* testsuite/gas/m68k/op68000.d: Update for new error messages.
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2020-04-21 Tamar Christina <tamar.christina@arm.com>
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PR binutils/24753
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@ -193,3 +193,9 @@
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.*statement `pea \(\[%zpc,%a0\],2000\)' ignored
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.*statement `pea \(\[%zpc,%d0:w:2\]\)' ignored
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.*statement `pea \(\[%d0,%zpc\]\)' ignored
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.*statement `cmpib &1,0\(%pc\)' ignored
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.*statement `cmpiw &1,0\(%pc\)' ignored
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.*statement `cmpil &1,0\(%pc\)' ignored
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.*statement `cmpb &1,0\(%pc\)' ignored
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.*statement `cmpw &1,0\(%pc\)' ignored
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.*statement `cmpl &1,0\(%pc\)' ignored
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@ -240,3 +240,15 @@ Disassembly of section .text:
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0+508 <foo\+(0x|)508> addiw #1,%d0
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0+50c <foo\+(0x|)50c> addil #1,%d0
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0+512 <foo\+(0x|)512> addqb #1,%d0
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0+514 <foo\+(0x|)514> cmpib #1,%d0
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0+518 <foo\+(0x|)518> cmpib #1,%pc@\(0+51c <foo\+(0x|)51c>\)
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0+51e <foo\+(0x|)51e> cmpiw #1,%d0
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0+522 <foo\+(0x|)522> cmpiw #1,%pc@\(0+526 <foo\+(0x|)526>\)
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0+528 <foo\+(0x|)528> cmpil #1,%d0
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0+52e <foo\+(0x|)52e> cmpil #1,%pc@\(0+534 <foo\+(0x|)534>\)
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0+536 <foo\+(0x|)536> cmpib #1,%d0
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0+53a <foo\+(0x|)53a> cmpib #1,%pc@\(0+53e <foo\+(0x|)53e>\)
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0+540 <foo\+(0x|)540> cmpiw #1,%d0
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0+544 <foo\+(0x|)544> cmpiw #1,%pc@\(0+548 <foo\+(0x|)548>\)
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0+54a <foo\+(0x|)54a> cmpil #1,%d0
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0+550 <foo\+(0x|)550> cmpil #1,%pc@\(0+556 <foo\+(0x|)556>\)
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@ -270,3 +270,18 @@ foo:
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addiw &1,%d0
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addil &1,%d0
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addqb &1,%d0
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| cmpi
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cmpib &1,%d0
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cmpib &1,0(%pc)
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cmpiw &1,%d0
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cmpiw &1,0(%pc)
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cmpil &1,%d0
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cmpil &1,0(%pc)
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cmpb &1,%d0
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cmpb &1,0(%pc)
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cmpw &1,%d0
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cmpw &1,0(%pc)
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cmpl &1,%d0
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cmpl &1,0(%pc)
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@ -1,3 +1,9 @@
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2020-04-21 Andreas Schwab <schwab@linux-m68k.org>
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PR 25848
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* m68k-opc.c (m68k_opcodes): Allow pc-rel for second operand of
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cmpi only on m68020up and cpu32.
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2020-04-20 Sudakshina Das <sudi.das@arm.com>
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* aarch64-asm.c (aarch64_ins_none): New.
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@ -265,11 +265,14 @@ const struct m68k_opcode m68k_opcodes[] =
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{"cmpaw", 2, one(0130300), one(0170700), "*wAd", m68000up },
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{"cmpal", 2, one(0130700), one(0170700), "*lAd", m68000up | mcfisa_a },
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{"cmpib", 4, one(0006000), one(0177700), "#b@s", m68000up },
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{"cmpib", 4, one(0006000), one(0177700), "#b$s", m68000 | m68010 },
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{"cmpib", 4, one(0006000), one(0177700), "#b@s", m68020up | cpu32 | fido_a },
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{"cmpib", 4, one(0006000), one(0177700), "#bDs", mcfisa_b | mcfisa_c },
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{"cmpiw", 4, one(0006100), one(0177700), "#w@s", m68000up },
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{"cmpiw", 4, one(0006100), one(0177700), "#w$s", m68000 | m68010 },
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{"cmpiw", 4, one(0006100), one(0177700), "#w@s", m68020up | cpu32 | fido_a },
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{"cmpiw", 4, one(0006100), one(0177700), "#wDs", mcfisa_b | mcfisa_c },
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{"cmpil", 6, one(0006200), one(0177700), "#l@s", m68000up },
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{"cmpil", 6, one(0006200), one(0177700), "#l$s", m68000 | m68010 },
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{"cmpil", 6, one(0006200), one(0177700), "#l@s", m68020up | cpu32 | fido_a },
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{"cmpil", 6, one(0006200), one(0177700), "#lDs", mcfisa_a },
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{"cmpmb", 2, one(0130410), one(0170770), "+s+d", m68000up },
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@ -277,18 +280,21 @@ const struct m68k_opcode m68k_opcodes[] =
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{"cmpml", 2, one(0130610), one(0170770), "+s+d", m68000up },
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/* The cmp opcode can generate the cmpa, cmpm, and cmpi instructions. */
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{"cmpb", 4, one(0006000), one(0177700), "#b@s", m68000up },
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{"cmpb", 4, one(0006000), one(0177700), "#b$s", m68000 | m68010 },
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{"cmpb", 4, one(0006000), one(0177700), "#b@s", m68020up | cpu32 | fido_a },
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{"cmpb", 4, one(0006000), one(0177700), "#bDs", mcfisa_b | mcfisa_c },
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{"cmpb", 2, one(0130410), one(0170770), "+s+d", m68000up },
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{"cmpb", 2, one(0130000), one(0170700), ";bDd", m68000up },
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{"cmpb", 2, one(0130000), one(0170700), "*bDd", mcfisa_b | mcfisa_c },
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{"cmpw", 2, one(0130300), one(0170700), "*wAd", m68000up },
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{"cmpw", 4, one(0006100), one(0177700), "#w@s", m68000up },
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{"cmpw", 4, one(0006100), one(0177700), "#w$s", m68000 | m68010 },
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{"cmpw", 4, one(0006100), one(0177700), "#w@s", m68020up | cpu32 | fido_a },
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{"cmpw", 4, one(0006100), one(0177700), "#wDs", mcfisa_b | mcfisa_c },
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{"cmpw", 2, one(0130510), one(0170770), "+s+d", m68000up },
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{"cmpw", 2, one(0130100), one(0170700), "*wDd", m68000up | mcfisa_b | mcfisa_c },
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{"cmpl", 2, one(0130700), one(0170700), "*lAd", m68000up | mcfisa_a },
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{"cmpl", 6, one(0006200), one(0177700), "#l@s", m68000up },
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{"cmpl", 6, one(0006200), one(0177700), "#l$s", m68000 | m68010 },
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{"cmpl", 6, one(0006200), one(0177700), "#l@s", m68020up | cpu32 | fido_a },
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{"cmpl", 6, one(0006200), one(0177700), "#lDs", mcfisa_a },
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{"cmpl", 2, one(0130610), one(0170770), "+s+d", m68000up },
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{"cmpl", 2, one(0130200), one(0170700), "*lDd", m68000up | mcfisa_a },
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