x86: support VMGEXIT
It has been publicly documented for quite some time, albeit not in the "General-Purpose and System Instructions" volume: https://www.amd.com/system/files/TechDocs/24593.pdf.
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@ -1,3 +1,13 @@
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2020-03-04 Jan Beulich <jbeulich@suse.com>
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* config/tc-i386.c (cpu_arch): Add .sev_es entry.
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* doc/c-i386.texi: Mention sev_es.
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* testsuite/gas/i386/arch-13.s: Add SEV-ES case.
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* testsuite/gas/i386/arch-13.d: Extend -march=. Adjust
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expectations.
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* testsuite/gas/i386/arch-13-znver1.d,
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testsuite/gas/i386/arch-13-znver2.d: Extend -march=.
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2020-03-03 H.J. Lu <hongjiu.lu@intel.com>
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2020-03-03 H.J. Lu <hongjiu.lu@intel.com>
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* config/tc-i386.c (match_template): Replace ignoresize and
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* config/tc-i386.c (match_template): Replace ignoresize and
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@ -1188,6 +1188,8 @@ static const arch_entry cpu_arch[] =
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CPU_RDPRU_FLAGS, 0 },
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CPU_RDPRU_FLAGS, 0 },
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{ STRING_COMMA_LEN (".mcommit"), PROCESSOR_UNKNOWN,
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{ STRING_COMMA_LEN (".mcommit"), PROCESSOR_UNKNOWN,
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CPU_MCOMMIT_FLAGS, 0 },
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CPU_MCOMMIT_FLAGS, 0 },
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{ STRING_COMMA_LEN (".sev_es"), PROCESSOR_UNKNOWN,
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CPU_SEV_ES_FLAGS, 0 },
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};
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};
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static const noarch_entry cpu_noarch[] =
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static const noarch_entry cpu_noarch[] =
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@ -251,6 +251,7 @@ accept various extension mnemonics. For example,
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@code{cldemote},
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@code{cldemote},
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@code{rdpru},
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@code{rdpru},
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@code{mcommit},
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@code{mcommit},
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@code{sev_es},
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@code{lwp},
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@code{lwp},
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@code{fma4},
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@code{fma4},
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@code{xop},
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@code{xop},
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@ -1454,7 +1455,7 @@ supported on the CPU specified. The choices for @var{cpu_type} are:
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@item @samp{.syscall} @tab @samp{.rdtscp} @tab @samp{.svme}
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@item @samp{.syscall} @tab @samp{.rdtscp} @tab @samp{.svme}
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@item @samp{.lwp} @tab @samp{.fma4} @tab @samp{.xop} @tab @samp{.cx16}
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@item @samp{.lwp} @tab @samp{.fma4} @tab @samp{.xop} @tab @samp{.cx16}
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@item @samp{.padlock} @tab @samp{.clzero} @tab @samp{.mwaitx} @tab @samp{.rdpru}
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@item @samp{.padlock} @tab @samp{.clzero} @tab @samp{.mwaitx} @tab @samp{.rdpru}
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@item @samp{.mcommit}
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@item @samp{.mcommit} @tab @samp{.sev_es}
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@end multitable
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@end multitable
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Apart from the warning, there are only two other effects on
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Apart from the warning, there are only two other effects on
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@ -1,5 +1,5 @@
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#source: arch-13.s
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#source: arch-13.s
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#as: -march=znver1+rdpid+clwb+wbnoinvd+rdpru+mcommit
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#as: -march=znver1+rdpid+clwb+wbnoinvd+rdpru+mcommit+sev_es
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#objdump: -dw
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#objdump: -dw
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#name: i386 arch 13 (znver1)
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#name: i386 arch 13 (znver1)
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#dump: arch-13.d
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#dump: arch-13.d
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@ -1,5 +1,5 @@
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#source: arch-13.s
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#source: arch-13.s
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#as: -march=znver2
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#as: -march=znver2+sev_es
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#objdump: -dw
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#objdump: -dw
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#name: i386 arch 13 (znver2)
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#name: i386 arch 13 (znver2)
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#dump: arch-13.d
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#dump: arch-13.d
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@ -1,4 +1,4 @@
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#as: -march=i686+smap+adx+rdseed+clzero+xsavec+xsaves+clflushopt+mwaitx+rdpid+clwb+wbnoinvd+rdpru+mcommit
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#as: -march=i686+smap+adx+rdseed+clzero+xsavec+xsaves+clflushopt+mwaitx+rdpid+clwb+wbnoinvd+rdpru+mcommit+sev_es
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#objdump: -dw
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#objdump: -dw
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#name: i386 arch 13
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#name: i386 arch 13
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@ -28,5 +28,6 @@ Disassembly of section .text:
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[ ]*[a-f0-9]+:[ ]*f3 0f 01 fa[ ]*mcommit[ ]*
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[ ]*[a-f0-9]+:[ ]*f3 0f 01 fa[ ]*mcommit[ ]*
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[ ]*[a-f0-9]+:[ ]*f3 0f c7 f8[ ]*rdpid %eax
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[ ]*[a-f0-9]+:[ ]*f3 0f c7 f8[ ]*rdpid %eax
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[ ]*[a-f0-9]+:[ ]*0f 01 fd[ ]*rdpru[ ]*
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[ ]*[a-f0-9]+:[ ]*0f 01 fd[ ]*rdpru[ ]*
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[ ]*[a-f0-9]+:[ ]*f3 0f 01 d9[ ]*vmgexit[ ]*
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[ ]*[a-f0-9]+:[ ]*f3 0f 09[ ]*wbnoinvd[ ]*
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[ ]*[a-f0-9]+:[ ]*f3 0f 09[ ]*wbnoinvd[ ]*
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#pass
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#pass
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@ -38,5 +38,8 @@
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# rdpru instruction
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# rdpru instruction
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rdpru
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rdpru
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# vmgexit instruction
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vmgexit
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# wbnoinvd instruction
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# wbnoinvd instruction
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wbnoinvd
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wbnoinvd
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@ -1,3 +1,15 @@
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2020-03-04 Jan Beulich <jbeulich@suse.com>
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* i386-dis.c (PREFIX_0F01_REG_3_RM_1): New.
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(prefix_table): Move vmmcall here. Add vmgexit.
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(rm_table): Replace vmmcall entry by prefix_table[] escape.
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* i386-gen.c (cpu_flag_init): Add CPU_SEV_ES_FLAGS entry.
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(cpu_flags): Add CpuSEV_ES entry.
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* i386-opc.h (CpuSEV_ES): New.
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(union i386_cpu_flags): Add cpusev_es field.
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* i386-opc.tbl (vmgexit): New.
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* i386-init.h, i386-tbl.h: Re-generate.
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2020-03-03 H.J. Lu <hongjiu.lu@intel.com>
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2020-03-03 H.J. Lu <hongjiu.lu@intel.com>
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* i386-gen.c (opcode_modifiers): Replace IgnoreSize/DefaultSize
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* i386-gen.c (opcode_modifiers): Replace IgnoreSize/DefaultSize
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@ -959,6 +959,7 @@ enum
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enum
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enum
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{
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{
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PREFIX_90 = 0,
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PREFIX_90 = 0,
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PREFIX_0F01_REG_3_RM_1,
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PREFIX_0F01_REG_5_MOD_0,
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PREFIX_0F01_REG_5_MOD_0,
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PREFIX_0F01_REG_5_MOD_3_RM_0,
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PREFIX_0F01_REG_5_MOD_3_RM_0,
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PREFIX_0F01_REG_5_MOD_3_RM_2,
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PREFIX_0F01_REG_5_MOD_3_RM_2,
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@ -3627,6 +3628,14 @@ static const struct dis386 prefix_table[][4] = {
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{ NULL, { { NULL, 0 } }, PREFIX_IGNORED }
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{ NULL, { { NULL, 0 } }, PREFIX_IGNORED }
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},
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},
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/* PREFIX_0F01_REG_3_MOD_1 */
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{
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{ "vmmcall", { Skip_MODRM }, 0 },
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{ "vmgexit", { Skip_MODRM }, 0 },
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{ Bad_Opcode },
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{ "vmgexit", { Skip_MODRM }, 0 },
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},
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/* PREFIX_0F01_REG_5_MOD_0 */
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/* PREFIX_0F01_REG_5_MOD_0 */
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{
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{
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{ Bad_Opcode },
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{ Bad_Opcode },
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@ -11018,7 +11027,7 @@ static const struct dis386 rm_table[][8] = {
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{
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{
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/* RM_0F01_REG_3 */
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/* RM_0F01_REG_3 */
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{ "vmrun", { Skip_MODRM }, 0 },
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{ "vmrun", { Skip_MODRM }, 0 },
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{ "vmmcall", { Skip_MODRM }, 0 },
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{ PREFIX_TABLE (PREFIX_0F01_REG_3_RM_1) },
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{ "vmload", { Skip_MODRM }, 0 },
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{ "vmload", { Skip_MODRM }, 0 },
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{ "vmsave", { Skip_MODRM }, 0 },
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{ "vmsave", { Skip_MODRM }, 0 },
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{ "stgi", { Skip_MODRM }, 0 },
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{ "stgi", { Skip_MODRM }, 0 },
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@ -309,6 +309,8 @@ static initializer cpu_flag_init[] =
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"CpuRDPRU" },
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"CpuRDPRU" },
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{ "CPU_MCOMMIT_FLAGS",
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{ "CPU_MCOMMIT_FLAGS",
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"CpuMCOMMIT" },
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"CpuMCOMMIT" },
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{ "CPU_SEV_ES_FLAGS",
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"CpuSEV_ES" },
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{ "CPU_ANY_X87_FLAGS",
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{ "CPU_ANY_X87_FLAGS",
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"CPU_ANY_287_FLAGS|Cpu8087" },
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"CPU_ANY_287_FLAGS|Cpu8087" },
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{ "CPU_ANY_287_FLAGS",
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{ "CPU_ANY_287_FLAGS",
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@ -606,6 +608,7 @@ static bitfield cpu_flags[] =
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BITFIELD (CpuENQCMD),
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BITFIELD (CpuENQCMD),
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BITFIELD (CpuRDPRU),
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BITFIELD (CpuRDPRU),
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BITFIELD (CpuMCOMMIT),
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BITFIELD (CpuMCOMMIT),
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BITFIELD (CpuSEV_ES),
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#ifdef CpuUnused
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#ifdef CpuUnused
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BITFIELD (CpuUnused),
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BITFIELD (CpuUnused),
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#endif
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#endif
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File diff suppressed because it is too large
Load Diff
@ -247,6 +247,8 @@ enum
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CpuRDPRU,
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CpuRDPRU,
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/* MCOMMIT instruction required */
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/* MCOMMIT instruction required */
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CpuMCOMMIT,
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CpuMCOMMIT,
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/* SEV-ES instruction(s) required */
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CpuSEV_ES,
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/* 64bit support required */
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/* 64bit support required */
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Cpu64,
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Cpu64,
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/* Not supported in the 64bit mode */
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/* Not supported in the 64bit mode */
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@ -378,6 +380,7 @@ typedef union i386_cpu_flags
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unsigned int cpuenqcmd:1;
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unsigned int cpuenqcmd:1;
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unsigned int cpurdpru:1;
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unsigned int cpurdpru:1;
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unsigned int cpumcommit:1;
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unsigned int cpumcommit:1;
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unsigned int cpusev_es:1;
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unsigned int cpu64:1;
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unsigned int cpu64:1;
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unsigned int cpuno64:1;
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unsigned int cpuno64:1;
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#ifdef CpuUnused
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#ifdef CpuUnused
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@ -2835,6 +2835,7 @@ invlpga, 2, 0xf01df, None, 3, CpuSVME, AddrPrefixOpReg, { Acc|Word|Dword|Qword,
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skinit, 0, 0xf01de, None, 3, CpuSVME, No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { 0 }
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skinit, 0, 0xf01de, None, 3, CpuSVME, No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { 0 }
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skinit, 1, 0xf01de, None, 3, CpuSVME, No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Acc|Dword }
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skinit, 1, 0xf01de, None, 3, CpuSVME, No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Acc|Dword }
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stgi, 0, 0xf01dc, None, 3, CpuSVME, No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { 0 }
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stgi, 0, 0xf01dc, None, 3, CpuSVME, No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { 0 }
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vmgexit, 0, 0xf30f01d9, None, 3, CpuSEV_ES, No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { 0 }
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vmload, 0, 0xf01da, None, 3, CpuSVME, No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { 0 }
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vmload, 0, 0xf01da, None, 3, CpuSVME, No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { 0 }
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vmload, 1, 0xf01da, None, 3, CpuSVME, AddrPrefixOpReg, { Acc|Word|Dword|Qword }
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vmload, 1, 0xf01da, None, 3, CpuSVME, AddrPrefixOpReg, { Acc|Word|Dword|Qword }
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vmmcall, 0, 0xf01d9, None, 3, CpuSVME, No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { 0 }
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vmmcall, 0, 0xf01d9, None, 3, CpuSVME, No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { 0 }
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7870
opcodes/i386-tbl.h
7870
opcodes/i386-tbl.h
File diff suppressed because it is too large
Load Diff
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