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* elf32-tic6x.h: New.
	* elf-bfd.h (enum elf_target_id): Define TIC6X_ELF_DATA.
	* elf32-tic6x.c (struct elf32_tic6x_obj_tdata, elf32_tic6x_tdata,
	elf32_tic6x_howto_table_rel, elf32_tic6x_info_to_howto_rel,
	elf32_tic6x_set_use_rela_p, elf32_tic6x_mkobject,
	elf32_tic6x_new_section_hook, elf32_tic6x_rel_relocation_p,
	bfd_elf32_mkobject, bfd_elf32_new_section_hook): New.
	(elf32_tic6x_reloc_type_lookup, elf32_tic6x_reloc_name_lookup,
	elf32_tic6x_relocate_section): Handle REL relocations.
	(elf_info_to_howto_rel): Define to elf32_tic6x_info_to_howto_rel.

gas:
	* config/tc-tic6x.c (OPTION_MGENERATE_REL): New.
	(md_longopts): Add -mgenerate-rel.
	(tic6x_generate_rela): New.
	(md_parse_option): Handle -mgenerate-rel.
	(md_show_usage): Add comment that -mgenerate-rel is undocumented.
	(tic6x_init_after_args): New.
	(md_apply_fix): Correct shift calculations for SB-relative
	relocations.
	(md_pcrel_from): Change to tic6x_pcrel_from_section.  Do not
	adjust addresses for relocations referencing symbols in other
	sections.
	(tc_gen_reloc): Adjust addend calculations for REL relocations.
	* config/tc-tic6x.h (MD_PCREL_FROM_SECTION,
	tic6x_pcrel_from_section, tc_init_after_args,
	tic6x_init_after_args): New.

ld/testsuite:
	* ld-tic6x/data-reloc-global-rel.d,
	ld-tic6x/data-reloc-global-rel.s,
	ld-tic6x/data-reloc-local-r-rel.d,
	ld-tic6x/data-reloc-local-rel.d, ld-tic6x/mvk-reloc-global-rel.d,
	ld-tic6x/mvk-reloc-global-rel.s, ld-tic6x/mvk-reloc-local-1-rel.s,
	ld-tic6x/mvk-reloc-local-2-rel.s,
	ld-tic6x/mvk-reloc-local-r-rel.d, ld-tic6x/mvk-reloc-local-rel.d,
	ld-tic6x/pcrel-reloc-global-rel.d,
	ld-tic6x/pcrel-reloc-local-r-rel.d,
	ld-tic6x/pcrel-reloc-local-rel.d, ld-tic6x/sbr-reloc-global-rel.d,
	ld-tic6x/sbr-reloc-global-rel.s, ld-tic6x/sbr-reloc-local-1-rel.s,
	ld-tic6x/sbr-reloc-local-2-rel.s,
	ld-tic6x/sbr-reloc-local-r-rel.d, ld-tic6x/sbr-reloc-local-rel.d:
	New.
This commit is contained in:
Joseph Myers 2010-04-20 22:03:00 +00:00
parent 31ef98ae61
commit 418205099b
27 changed files with 1318 additions and 17 deletions
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13
bfd/ChangeLog
View File

@ -1,3 +1,16 @@
2010-04-20 Joseph Myers <joseph@codesourcery.com>
* elf32-tic6x.h: New.
* elf-bfd.h (enum elf_target_id): Define TIC6X_ELF_DATA.
* elf32-tic6x.c (struct elf32_tic6x_obj_tdata, elf32_tic6x_tdata,
elf32_tic6x_howto_table_rel, elf32_tic6x_info_to_howto_rel,
elf32_tic6x_set_use_rela_p, elf32_tic6x_mkobject,
elf32_tic6x_new_section_hook, elf32_tic6x_rel_relocation_p,
bfd_elf32_mkobject, bfd_elf32_new_section_hook): New.
(elf32_tic6x_reloc_type_lookup, elf32_tic6x_reloc_name_lookup,
elf32_tic6x_relocate_section): Handle REL relocations.
(elf_info_to_howto_rel): Define to elf32_tic6x_info_to_howto_rel.
2010-04-20 Jakub Jelinek <jakub@redhat.com>
* dwarf2.c (find_abstract_instance_name, scan_unit_for_symbols): Treat

1
bfd/elf-bfd.h
View File

@ -426,6 +426,7 @@ enum elf_target_id
SH_ELF_DATA,
SPARC_ELF_DATA,
SPU_ELF_DATA,
TIC6X_ELF_DATA,
X86_64_ELF_DATA,
XTENSA_ELF_DATA,
GENERIC_ELF_DATA

712
bfd/elf32-tic6x.c
View File

@ -25,6 +25,20 @@
#include "libiberty.h"
#include "elf-bfd.h"
#include "elf/tic6x.h"
#include "elf32-tic6x.h"
struct elf32_tic6x_obj_tdata
{
struct elf_obj_tdata root;
/* Whether to use RELA relocations when generating relocations.
This is a per-object flag to allow the assembler to generate REL
relocations for use in linker testcases. */
bfd_boolean use_rela_p;
};
#define elf32_tic6x_tdata(abfd) \
((struct elf32_tic6x_obj_tdata *) (abfd)->tdata.any)
static reloc_howto_type elf32_tic6x_howto_table[] =
{
@ -646,6 +660,566 @@ static reloc_howto_type elf32_tic6x_howto_table[] =
FALSE) /* pcrel_offset */
};
static reloc_howto_type elf32_tic6x_howto_table_rel[] =
{
HOWTO (R_C6000_NONE, /* type */
0, /* rightshift */
0, /* size (0 = byte, 1 = short, 2 = long) */
0, /* bitsize */
FALSE, /* pc_relative */
0, /* bitpos */
complain_overflow_dont,/* complain_on_overflow */
bfd_elf_generic_reloc, /* special_function */
"R_C6000_NONE", /* name */
TRUE, /* partial_inplace */
0, /* src_mask */
0, /* dst_mask */
FALSE), /* pcrel_offset */
HOWTO (R_C6000_ABS32, /* type */
0, /* rightshift */
2, /* size (0 = byte, 1 = short, 2 = long) */
32, /* bitsize */
FALSE, /* pc_relative */
0, /* bitpos */
complain_overflow_dont,/* complain_on_overflow */
bfd_elf_generic_reloc, /* special_function */
"R_C6000_ABS32", /* name */
TRUE, /* partial_inplace */
0xffffffff, /* src_mask */
0xffffffff, /* dst_mask */
FALSE), /* pcrel_offset */
HOWTO (R_C6000_ABS16, /* type */
0, /* rightshift */
1, /* size (0 = byte, 1 = short, 2 = long) */
16, /* bitsize */
FALSE, /* pc_relative */
0, /* bitpos */
complain_overflow_bitfield,/* complain_on_overflow */
bfd_elf_generic_reloc, /* special_function */
"R_C6000_ABS16", /* name */
TRUE, /* partial_inplace */
0x0000ffff, /* src_mask */
0x0000ffff, /* dst_mask */
FALSE), /* pcrel_offset */
HOWTO (R_C6000_ABS8, /* type */
0, /* rightshift */
0, /* size (0 = byte, 1 = short, 2 = long) */
8, /* bitsize */
FALSE, /* pc_relative */
0, /* bitpos */
complain_overflow_bitfield,/* complain_on_overflow */
bfd_elf_generic_reloc, /* special_function */
"R_C6000_ABS8", /* name */
TRUE, /* partial_inplace */
0x000000ff, /* src_mask */
0x000000ff, /* dst_mask */
FALSE), /* pcrel_offset */
HOWTO (R_C6000_PCR_S21, /* type */
2, /* rightshift */
2, /* size (0 = byte, 1 = short, 2 = long) */
21, /* bitsize */
TRUE, /* pc_relative */
7, /* bitpos */
complain_overflow_signed,/* complain_on_overflow */
bfd_elf_generic_reloc, /* special_function */
"R_C6000_PCR_S21", /* name */
TRUE, /* partial_inplace */
0x0fffff80, /* src_mask */
0x0fffff80, /* dst_mask */
TRUE), /* pcrel_offset */
HOWTO (R_C6000_PCR_S12, /* type */
2, /* rightshift */
2, /* size (0 = byte, 1 = short, 2 = long) */
12, /* bitsize */
TRUE, /* pc_relative */
16, /* bitpos */
complain_overflow_signed,/* complain_on_overflow */
bfd_elf_generic_reloc, /* special_function */
"R_C6000_PCR_S12", /* name */
TRUE, /* partial_inplace */
0x0fff0000, /* src_mask */
0x0fff0000, /* dst_mask */
TRUE), /* pcrel_offset */
HOWTO (R_C6000_PCR_S10, /* type */
2, /* rightshift */
2, /* size (0 = byte, 1 = short, 2 = long) */
10, /* bitsize */
TRUE, /* pc_relative */
13, /* bitpos */
complain_overflow_signed,/* complain_on_overflow */
bfd_elf_generic_reloc, /* special_function */
"R_C6000_PCR_S10", /* name */
TRUE, /* partial_inplace */
0x007fe000, /* src_mask */
0x007fe000, /* dst_mask */
TRUE), /* pcrel_offset */
HOWTO (R_C6000_PCR_S7, /* type */
2, /* rightshift */
2, /* size (0 = byte, 1 = short, 2 = long) */
7, /* bitsize */
TRUE, /* pc_relative */
16, /* bitpos */
complain_overflow_signed,/* complain_on_overflow */
bfd_elf_generic_reloc, /* special_function */
"R_C6000_PCR_S7", /* name */
TRUE, /* partial_inplace */
0x007f0000, /* src_mask */
0x007f0000, /* dst_mask */
TRUE), /* pcrel_offset */
HOWTO (R_C6000_ABS_S16, /* type */
0, /* rightshift */
2, /* size (0 = byte, 1 = short, 2 = long) */
16, /* bitsize */
FALSE, /* pc_relative */
7, /* bitpos */
complain_overflow_signed,/* complain_on_overflow */
bfd_elf_generic_reloc, /* special_function */
"R_C6000_ABS_S16", /* name */
TRUE, /* partial_inplace */
0x007fff80, /* src_mask */
0x007fff80, /* dst_mask */
FALSE), /* pcrel_offset */
HOWTO (R_C6000_ABS_L16, /* type */
0, /* rightshift */
2, /* size (0 = byte, 1 = short, 2 = long) */
16, /* bitsize */
FALSE, /* pc_relative */
7, /* bitpos */
complain_overflow_dont,/* complain_on_overflow */
bfd_elf_generic_reloc, /* special_function */
"R_C6000_ABS_L16", /* name */
TRUE, /* partial_inplace */
0x007fff80, /* src_mask */
0x007fff80, /* dst_mask */
FALSE), /* pcrel_offset */
EMPTY_HOWTO (R_C6000_ABS_H16),
HOWTO (R_C6000_SBR_U15_B, /* type */
0, /* rightshift */
2, /* size (0 = byte, 1 = short, 2 = long) */
15, /* bitsize */
FALSE, /* pc_relative */
8, /* bitpos */
complain_overflow_unsigned,/* complain_on_overflow */
bfd_elf_generic_reloc, /* special_function */
"R_C6000_SBR_U15_B", /* name */
TRUE, /* partial_inplace */
0x007fff00, /* src_mask */
0x007fff00, /* dst_mask */
FALSE), /* pcrel_offset */
HOWTO (R_C6000_SBR_U15_H, /* type */
1, /* rightshift */
2, /* size (0 = byte, 1 = short, 2 = long) */
15, /* bitsize */
FALSE, /* pc_relative */
8, /* bitpos */
complain_overflow_unsigned,/* complain_on_overflow */
bfd_elf_generic_reloc, /* special_function */
"R_C6000_SBR_U15_H", /* name */
TRUE, /* partial_inplace */
0x007fff00, /* src_mask */
0x007fff00, /* dst_mask */
FALSE), /* pcrel_offset */
HOWTO (R_C6000_SBR_U15_W, /* type */
2, /* rightshift */
2, /* size (0 = byte, 1 = short, 2 = long) */
15, /* bitsize */
FALSE, /* pc_relative */
8, /* bitpos */
complain_overflow_unsigned,/* complain_on_overflow */
bfd_elf_generic_reloc, /* special_function */
"R_C6000_SBR_U15_W", /* name */
TRUE, /* partial_inplace */
0x007fff00, /* src_mask */
0x007fff00, /* dst_mask */
FALSE), /* pcrel_offset */
HOWTO (R_C6000_SBR_S16, /* type */
0, /* rightshift */
2, /* size (0 = byte, 1 = short, 2 = long) */
16, /* bitsize */
FALSE, /* pc_relative */
7, /* bitpos */
complain_overflow_signed,/* complain_on_overflow */
bfd_elf_generic_reloc, /* special_function */
"R_C6000_SBR_S16", /* name */
TRUE, /* partial_inplace */
0x007fff80, /* src_mask */
0x007fff80, /* dst_mask */
FALSE), /* pcrel_offset */
HOWTO (R_C6000_SBR_L16_B, /* type */
0, /* rightshift */
2, /* size (0 = byte, 1 = short, 2 = long) */
16, /* bitsize */
FALSE, /* pc_relative */
7, /* bitpos */
complain_overflow_dont,/* complain_on_overflow */
bfd_elf_generic_reloc, /* special_function */
"R_C6000_SBR_L16_B", /* name */
TRUE, /* partial_inplace */
0x007fff80, /* src_mask */
0x007fff80, /* dst_mask */
FALSE), /* pcrel_offset */
HOWTO (R_C6000_SBR_L16_H, /* type */
1, /* rightshift */
2, /* size (0 = byte, 1 = short, 2 = long) */
16, /* bitsize */
FALSE, /* pc_relative */
7, /* bitpos */
complain_overflow_dont,/* complain_on_overflow */
bfd_elf_generic_reloc, /* special_function */
"R_C6000_SBR_L16_H", /* name */
TRUE, /* partial_inplace */
0x007fff80, /* src_mask */
0x007fff80, /* dst_mask */
FALSE), /* pcrel_offset */
HOWTO (R_C6000_SBR_L16_W, /* type */
2, /* rightshift */
2, /* size (0 = byte, 1 = short, 2 = long) */
16, /* bitsize */
FALSE, /* pc_relative */
7, /* bitpos */
complain_overflow_dont,/* complain_on_overflow */
bfd_elf_generic_reloc, /* special_function */
"R_C6000_SBR_L16_W", /* name */
TRUE, /* partial_inplace */
0x007fff80, /* src_mask */
0x007fff80, /* dst_mask */
FALSE), /* pcrel_offset */
EMPTY_HOWTO (R_C6000_SBR_H16_B),
EMPTY_HOWTO (R_C6000_SBR_H16_H),
EMPTY_HOWTO (R_C6000_SBR_H16_W),
HOWTO (R_C6000_SBR_GOT_U15_W, /* type */
2, /* rightshift */
2, /* size (0 = byte, 1 = short, 2 = long) */
15, /* bitsize */
FALSE, /* pc_relative */
8, /* bitpos */
complain_overflow_unsigned,/* complain_on_overflow */
bfd_elf_generic_reloc, /* special_function */
"R_C6000_SBR_GOT_U15_W",/* name */
TRUE, /* partial_inplace */
0x007fff00, /* src_mask */
0x007fff00, /* dst_mask */
FALSE), /* pcrel_offset */
HOWTO (R_C6000_SBR_GOT_L16_W, /* type */
2, /* rightshift */
2, /* size (0 = byte, 1 = short, 2 = long) */
16, /* bitsize */
FALSE, /* pc_relative */
7, /* bitpos */
complain_overflow_dont,/* complain_on_overflow */
bfd_elf_generic_reloc, /* special_function */
"R_C6000_SBR_GOT_L16_W",/* name */
TRUE, /* partial_inplace */
0x007fff80, /* src_mask */
0x007fff80, /* dst_mask */
FALSE), /* pcrel_offset */
EMPTY_HOWTO (R_C6000_SBR_GOT_H16_W),
HOWTO (R_C6000_DSBT_INDEX, /* type */
0, /* rightshift */
2, /* size (0 = byte, 1 = short, 2 = long) */
15, /* bitsize */
FALSE, /* pc_relative */
8, /* bitpos */
complain_overflow_unsigned,/* complain_on_overflow */
bfd_elf_generic_reloc, /* special_function */
"R_C6000_DSBT_INDEX", /* name */
TRUE, /* partial_inplace */
0, /* src_mask */
0x007fff00, /* dst_mask */
FALSE), /* pcrel_offset */
HOWTO (R_C6000_PREL31, /* type */
1, /* rightshift */
2, /* size (0 = byte, 1 = short, 2 = long) */
31, /* bitsize */
FALSE, /* pc_relative */
0, /* bitpos */
complain_overflow_dont,/* complain_on_overflow */
bfd_elf_generic_reloc, /* special_function */
"R_C6000_PREL31", /* name */
TRUE, /* partial_inplace */
0, /* src_mask */
0x7fffffff, /* dst_mask */
FALSE), /* pcrel_offset */
HOWTO (R_C6000_COPY, /* type */
0, /* rightshift */
2, /* size (0 = byte, 1 = short, 2 = long) */
32, /* bitsize */
FALSE, /* pc_relative */
0, /* bitpos */
complain_overflow_dont,/* complain_on_overflow */
bfd_elf_generic_reloc, /* special_function */
"R_C6000_COPY", /* name */
TRUE, /* partial_inplace */
0, /* src_mask */
0xffffffff, /* dst_mask */
FALSE), /* pcrel_offset */
EMPTY_HOWTO (27),
EMPTY_HOWTO (28),
EMPTY_HOWTO (29),
EMPTY_HOWTO (30),
EMPTY_HOWTO (31),
EMPTY_HOWTO (32),
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HOWTO (R_C6000_ALIGN, /* type */
0, /* rightshift */
0, /* size (0 = byte, 1 = short, 2 = long) */
0, /* bitsize */
FALSE, /* pc_relative */
0, /* bitpos */
complain_overflow_dont,/* complain_on_overflow */
bfd_elf_generic_reloc, /* special_function */
"R_C6000_ALIGN", /* name */
TRUE, /* partial_inplace */
0, /* src_mask */
0, /* dst_mask */
FALSE), /* pcrel_offset */
HOWTO (R_C6000_FPHEAD, /* type */
0, /* rightshift */
0, /* size (0 = byte, 1 = short, 2 = long) */
0, /* bitsize */
FALSE, /* pc_relative */
0, /* bitpos */
complain_overflow_dont,/* complain_on_overflow */
bfd_elf_generic_reloc, /* special_function */
"R_C6000_FPHEAD", /* name */
TRUE, /* partial_inplace */
0, /* src_mask */
0, /* dst_mask */
FALSE), /* pcrel_offset */
HOWTO (R_C6000_NOCMP, /* type */
0, /* rightshift */
0, /* size (0 = byte, 1 = short, 2 = long) */
0, /* bitsize */
FALSE, /* pc_relative */
0, /* bitpos */
complain_overflow_dont,/* complain_on_overflow */
bfd_elf_generic_reloc, /* special_function */
"R_C6000_NOCMP", /* name */
TRUE, /* partial_inplace */
0, /* src_mask */
0, /* dst_mask */
FALSE) /* pcrel_offset */
};
/* Map BFD relocations to ELF relocations. */
typedef struct
@ -689,27 +1263,54 @@ static const tic6x_reloc_map elf32_tic6x_reloc_map[] =
};
static reloc_howto_type *
elf32_tic6x_reloc_type_lookup (bfd *abfd ATTRIBUTE_UNUSED,
bfd_reloc_code_real_type code)
elf32_tic6x_reloc_type_lookup (bfd *abfd, bfd_reloc_code_real_type code)
{
unsigned int i;
for (i = 0; i < ARRAY_SIZE (elf32_tic6x_reloc_map); i++)
if (elf32_tic6x_reloc_map[i].bfd_reloc_val == code)
return &elf32_tic6x_howto_table[elf32_tic6x_reloc_map[i].elf_reloc_val];
{
enum elf_tic6x_reloc_type elf_reloc_val;
reloc_howto_type *howto;
elf_reloc_val = elf32_tic6x_reloc_map[i].elf_reloc_val;
if (elf32_tic6x_tdata (abfd)->use_rela_p)
howto = &elf32_tic6x_howto_table[elf_reloc_val];
else
howto = &elf32_tic6x_howto_table_rel[elf_reloc_val];
/* Some relocations are RELA-only; do not return them for
REL. */
if (howto->name == NULL)
howto = NULL;
return howto;
}
return NULL;
}
static reloc_howto_type *
elf32_tic6x_reloc_name_lookup (bfd *abfd ATTRIBUTE_UNUSED, const char *r_name)
elf32_tic6x_reloc_name_lookup (bfd *abfd, const char *r_name)
{
unsigned int i;
if (elf32_tic6x_tdata (abfd)->use_rela_p)
{
unsigned int i;
for (i = 0; i < ARRAY_SIZE (elf32_tic6x_howto_table); i++)
if (elf32_tic6x_howto_table[i].name != NULL
&& strcasecmp (elf32_tic6x_howto_table[i].name, r_name) == 0)
return &elf32_tic6x_howto_table[i];
for (i = 0; i < ARRAY_SIZE (elf32_tic6x_howto_table); i++)
if (elf32_tic6x_howto_table[i].name != NULL
&& strcasecmp (elf32_tic6x_howto_table[i].name, r_name) == 0)
return &elf32_tic6x_howto_table[i];
}
else
{
unsigned int i;
for (i = 0; i < ARRAY_SIZE (elf32_tic6x_howto_table_rel); i++)
if (elf32_tic6x_howto_table_rel[i].name != NULL
&& strcasecmp (elf32_tic6x_howto_table_rel[i].name, r_name) == 0)
return &elf32_tic6x_howto_table_rel[i];
}
return NULL;
}
@ -727,6 +1328,71 @@ elf32_tic6x_info_to_howto (bfd *abfd ATTRIBUTE_UNUSED, arelent *bfd_reloc,
bfd_reloc->howto = &elf32_tic6x_howto_table[r_type];
}
static void
elf32_tic6x_info_to_howto_rel (bfd *abfd ATTRIBUTE_UNUSED, arelent *bfd_reloc,
Elf_Internal_Rela *elf_reloc)
{
unsigned int r_type;
r_type = ELF32_R_TYPE (elf_reloc->r_info);
if (r_type >= ARRAY_SIZE (elf32_tic6x_howto_table_rel))
bfd_reloc->howto = NULL;
else
bfd_reloc->howto = &elf32_tic6x_howto_table_rel[r_type];
}
void
elf32_tic6x_set_use_rela_p (bfd *abfd, bfd_boolean use_rela_p)
{
elf32_tic6x_tdata (abfd)->use_rela_p = use_rela_p;
}
static bfd_boolean
elf32_tic6x_mkobject (bfd *abfd)
{
bfd_boolean ret;
ret = bfd_elf_allocate_object (abfd, sizeof (struct elf32_tic6x_obj_tdata),
TIC6X_ELF_DATA);
if (ret)
elf32_tic6x_set_use_rela_p (abfd, TRUE);
return ret;
}
static bfd_boolean
elf32_tic6x_new_section_hook (bfd *abfd, asection *sec)
{
bfd_boolean ret;
ret = _bfd_elf_new_section_hook (abfd, sec);
sec->use_rela_p = elf32_tic6x_tdata (abfd)->use_rela_p;
return ret;
}
/* Return true if relocation REL against section SEC is a REL rather
than RELA relocation. RELOCS is the first relocation in the
section and ABFD is the bfd that contains SEC. */
static bfd_boolean
elf32_tic6x_rel_relocation_p (bfd *abfd, asection *sec,
const Elf_Internal_Rela *relocs,
const Elf_Internal_Rela *rel)
{
Elf_Internal_Shdr *rel_hdr;
const struct elf_backend_data *bed;
/* To determine which flavor of relocation this is, we depend on the
fact that the INPUT_SECTION's REL_HDR is read before its
REL_HDR2. */
rel_hdr = &elf_section_data (sec)->rel_hdr;
bed = get_elf_backend_data (abfd);
if ((size_t) (rel - relocs)
>= (NUM_SHDR_ENTRIES (rel_hdr) * bed->s->int_rels_per_ext_rel))
rel_hdr = elf_section_data (sec)->rel_hdr2;
return rel_hdr->sh_entsize == bed->s->sizeof_rel;
}
static bfd_boolean
elf32_tic6x_relocate_section (bfd *output_bfd,
struct bfd_link_info *info,
@ -761,11 +1427,18 @@ elf32_tic6x_relocate_section (bfd *output_bfd,
bfd_boolean unresolved_reloc;
bfd_reloc_status_type r;
struct bfd_link_hash_entry *sbh;
bfd_boolean is_rel;
r_type = ELF32_R_TYPE (rel->r_info);
r_symndx = ELF32_R_SYM (rel->r_info);
elf32_tic6x_info_to_howto (input_bfd, &bfd_reloc, rel);
is_rel = elf32_tic6x_rel_relocation_p (input_bfd, input_section,
relocs, rel);
if (is_rel)
elf32_tic6x_info_to_howto_rel (input_bfd, &bfd_reloc, rel);
else
elf32_tic6x_info_to_howto (input_bfd, &bfd_reloc, rel);
howto = bfd_reloc.howto;
if (howto == NULL)
{
@ -806,7 +1479,19 @@ elf32_tic6x_relocate_section (bfd *output_bfd,
}
if (info->relocatable)
continue;
{
if (is_rel
&& sym != NULL
&& ELF_ST_TYPE (sym->st_info) == STT_SECTION)
{
rel->r_addend = 0;
relocation = sec->output_offset + sym->st_value;
r = _bfd_relocate_contents (howto, input_bfd, relocation,
contents + rel->r_offset);
goto done_reloc;
}
continue;
}
switch (r_type)
{
@ -891,6 +1576,7 @@ elf32_tic6x_relocate_section (bfd *output_bfd,
contents, rel->r_offset,
relocation, rel->r_addend);
done_reloc:
if (r == bfd_reloc_ok
&& howto->complain_on_overflow == complain_overflow_bitfield)
{
@ -988,6 +1674,8 @@ elf32_tic6x_relocate_section (bfd *output_bfd,
#define ELF_MAXPAGESIZE 1
#define bfd_elf32_bfd_reloc_type_lookup elf32_tic6x_reloc_type_lookup
#define bfd_elf32_bfd_reloc_name_lookup elf32_tic6x_reloc_name_lookup
#define bfd_elf32_mkobject elf32_tic6x_mkobject
#define bfd_elf32_new_section_hook elf32_tic6x_new_section_hook
#define elf_backend_can_gc_sections 1
#define elf_backend_default_use_rela_p 1
#define elf_backend_may_use_rel_p 1
@ -995,6 +1683,6 @@ elf32_tic6x_relocate_section (bfd *output_bfd,
#define elf_backend_rela_normal 1
#define elf_backend_relocate_section elf32_tic6x_relocate_section
#define elf_info_to_howto elf32_tic6x_info_to_howto
#define elf_info_to_howto_rel _bfd_elf_no_info_to_howto
#define elf_info_to_howto_rel elf32_tic6x_info_to_howto_rel
#include "elf32-target.h"

24
bfd/elf32-tic6x.h Normal file
View File

@ -0,0 +1,24 @@
/* 32-bit ELF support for TI C6X
Copyright 2010
Free Software Foundation, Inc.
This file is part of BFD, the Binary File Descriptor library.
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 3 of the License, or
(at your option) any later version.
This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program; if not, write to the Free Software
Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
MA 02110-1301, USA. */
/* This function is provided for use from the assembler. */
extern void elf32_tic6x_set_use_rela_p (bfd *, bfd_boolean);

18
gas/ChangeLog
View File

@ -1,3 +1,21 @@
2010-04-20 Joseph Myers <joseph@codesourcery.com>
* config/tc-tic6x.c (OPTION_MGENERATE_REL): New.
(md_longopts): Add -mgenerate-rel.
(tic6x_generate_rela): New.
(md_parse_option): Handle -mgenerate-rel.
(md_show_usage): Add comment that -mgenerate-rel is undocumented.
(tic6x_init_after_args): New.
(md_apply_fix): Correct shift calculations for SB-relative
relocations.
(md_pcrel_from): Change to tic6x_pcrel_from_section. Do not
adjust addresses for relocations referencing symbols in other
sections.
(tc_gen_reloc): Adjust addend calculations for REL relocations.
* config/tc-tic6x.h (MD_PCREL_FROM_SECTION,
tic6x_pcrel_from_section, tc_init_after_args,
tic6x_init_after_args): New.
2010-04-20 Nick Clifton <nickc@redhat.com>
PR gas/11507

73
gas/config/tc-tic6x.c
View File

@ -24,6 +24,7 @@
#include "safe-ctype.h"
#include "subsegs.h"
#include "opcode/tic6x.h"
#include "elf32-tic6x.h"
/* Truncate and sign-extend at 32 bits, so that building on a 64-bit
host gives identical results to a 32-bit host. */
@ -45,7 +46,8 @@ enum
OPTION_MATOMIC,
OPTION_MNO_ATOMIC,
OPTION_MBIG_ENDIAN,
OPTION_MLITTLE_ENDIAN
OPTION_MLITTLE_ENDIAN,
OPTION_MGENERATE_REL
};
struct option md_longopts[] =
@ -55,6 +57,7 @@ struct option md_longopts[] =
{ "mno-atomic", no_argument, NULL, OPTION_MNO_ATOMIC },
{ "mbig-endian", no_argument, NULL, OPTION_MBIG_ENDIAN },
{ "mlittle-endian", no_argument, NULL, OPTION_MLITTLE_ENDIAN },
{ "mgenerate-rel", no_argument, NULL, OPTION_MGENERATE_REL },
{ NULL, no_argument, NULL, 0 }
};
size_t md_longopts_size = sizeof (md_longopts);
@ -95,6 +98,9 @@ static bfd_boolean tic6x_long_data_constraints;
/* Whether compact instructions are available. */
static bfd_boolean tic6x_compact_insns;
/* Whether to generate RELA relocations. */
static bfd_boolean tic6x_generate_rela = TRUE;
/* Table of supported architecture variants. */
typedef struct
{
@ -162,6 +168,10 @@ md_parse_option (int c, char *arg)
target_big_endian = 0;
break;
case OPTION_MGENERATE_REL:
tic6x_generate_rela = FALSE;
break;
default:
return 0;
}
@ -180,6 +190,8 @@ md_show_usage (FILE *stream ATTRIBUTE_UNUSED)
fprintf (stream, _(" -mno-atomic disable atomic operation instructions\n"));
fprintf (stream, _(" -mbig-endian generate big-endian code\n"));
fprintf (stream, _(" -mlittle-endian generate little-endian code\n"));
/* -mgenerate-rel is only for testsuite use and is deliberately
undocumented. */
fputc ('\n', stream);
fprintf (stream, _("Supported ARCH values are:"));
@ -512,6 +524,15 @@ tic6x_cleanup (void)
tic6x_end_of_line ();
}
/* Do target-specific initialization after arguments have been
processed and the output file created. */
void
tic6x_init_after_args (void)
{
elf32_tic6x_set_use_rela_p (stdoutput, tic6x_generate_rela);
}
/* Handle a data alignment of N bytes. */
void
@ -3111,8 +3132,25 @@ md_apply_fix (fixS *fixP, valueT *valP, segT seg ATTRIBUTE_UNUSED)
if (fixP->fx_done || !seg->use_rela_p)
{
offsetT newval = md_chars_to_number (buf, 4);
int shift;
MODIFY_VALUE (newval, value, 0, 7, 16);
switch (fixP->fx_r_type)
{
case BFD_RELOC_C6000_SBR_L16_H:
shift = 1;
break;
case BFD_RELOC_C6000_SBR_L16_W:
case BFD_RELOC_C6000_SBR_GOT_L16_W:
shift = 2;
break;
default:
shift = 0;
break;
}
MODIFY_VALUE (newval, value, shift, 7, 16);
if ((value < -0x8000 || value > 0x7fff)
&& (fixP->fx_r_type == BFD_RELOC_C6000_ABS_S16
|| fixP->fx_r_type == BFD_RELOC_C6000_SBR_S16))
@ -3135,8 +3173,25 @@ md_apply_fix (fixS *fixP, valueT *valP, segT seg ATTRIBUTE_UNUSED)
if (fixP->fx_done || !seg->use_rela_p)
{
offsetT newval = md_chars_to_number (buf, 4);
int shift;
MODIFY_VALUE (newval, value, 16, 7, 16);
switch (fixP->fx_r_type)
{
case BFD_RELOC_C6000_SBR_H16_H:
shift = 17;
break;
case BFD_RELOC_C6000_SBR_H16_W:
case BFD_RELOC_C6000_SBR_GOT_H16_W:
shift = 18;
break;
default:
shift = 16;
break;
}
MODIFY_VALUE (newval, value, shift, 7, 16);
md_number_to_chars (buf, newval, 4);
}
@ -3348,8 +3403,12 @@ md_operand (expressionS *op ATTRIBUTE_UNUSED)
packet. */
long
md_pcrel_from (fixS *fixp)
tic6x_pcrel_from_section (fixS *fixp, segT sec)
{
if (fixp->fx_addsy != NULL
&& (!S_IS_DEFINED (fixp->fx_addsy)
|| S_GET_SEGMENT (fixp->fx_addsy) != sec))
return 0;
return (fixp->fx_where + fixp->fx_frag->fr_address) & ~(long) 0x1f;
}
@ -3386,7 +3445,7 @@ tc_gen_reloc (asection *section ATTRIBUTE_UNUSED, fixS *fixp)
reloc->sym_ptr_ptr = xmalloc (sizeof (asymbol *));
*reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy);
reloc->address = fixp->fx_frag->fr_address + fixp->fx_where;
reloc->addend = fixp->fx_offset;
reloc->addend = (tic6x_generate_rela ? fixp->fx_offset : 0);
r_type = fixp->fx_r_type;
reloc->howto = bfd_reloc_type_lookup (stdoutput, r_type);
@ -3398,5 +3457,9 @@ tc_gen_reloc (asection *section ATTRIBUTE_UNUSED, fixS *fixp)
return NULL;
}
/* Correct for adjustments bfd_install_relocation will make. */
if (reloc->howto->pcrel_offset && reloc->howto->partial_inplace)
reloc->addend += reloc->address;
return reloc;
}

6
gas/config/tc-tic6x.h
View File

@ -96,6 +96,9 @@ extern void tic6x_cons_align (int n);
extern int tic6x_parse_name (const char *name, expressionS *exprP,
enum expr_mode mode, char *nextchar);
#define MD_PCREL_FROM_SECTION(FIX, SEC) tic6x_pcrel_from_section (FIX, SEC)
extern long tic6x_pcrel_from_section (struct fix *fixp, segT sec);
#define md_start_line_hook() tic6x_start_line_hook ()
extern void tic6x_start_line_hook (void);
@ -107,5 +110,8 @@ extern void tic6x_cons_fix_new (fragS *frag, int where, int size,
#define tc_frob_label(sym) tic6x_frob_label (sym)
extern void tic6x_frob_label (symbolS *sym);
#define tc_init_after_args() tic6x_init_after_args ()
extern void tic6x_init_after_args (void);
#define tc_unrecognized_line(c) tic6x_unrecognized_line (c)
extern int tic6x_unrecognized_line (int c);

17
ld/testsuite/ChangeLog
View File

@ -1,3 +1,20 @@
2010-04-20 Joseph Myers <joseph@codesourcery.com>
* ld-tic6x/data-reloc-global-rel.d,
ld-tic6x/data-reloc-global-rel.s,
ld-tic6x/data-reloc-local-r-rel.d,
ld-tic6x/data-reloc-local-rel.d, ld-tic6x/mvk-reloc-global-rel.d,
ld-tic6x/mvk-reloc-global-rel.s, ld-tic6x/mvk-reloc-local-1-rel.s,
ld-tic6x/mvk-reloc-local-2-rel.s,
ld-tic6x/mvk-reloc-local-r-rel.d, ld-tic6x/mvk-reloc-local-rel.d,
ld-tic6x/pcrel-reloc-global-rel.d,
ld-tic6x/pcrel-reloc-local-r-rel.d,
ld-tic6x/pcrel-reloc-local-rel.d, ld-tic6x/sbr-reloc-global-rel.d,
ld-tic6x/sbr-reloc-global-rel.s, ld-tic6x/sbr-reloc-local-1-rel.s,
ld-tic6x/sbr-reloc-local-2-rel.s,
ld-tic6x/sbr-reloc-local-r-rel.d, ld-tic6x/sbr-reloc-local-rel.d:
New.
2010-04-15 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
* ld-arm/attr-merge-2.attr: Update for changes in attribute output.

11
ld/testsuite/ld-tic6x/data-reloc-global-rel.d Normal file
View File

@ -0,0 +1,11 @@
#name: C6X data relocations, global symbols, REL
#as: -mlittle-endian -mgenerate-rel
#ld: -melf32_tic6x_le -Tgeneric.ld --defsym s0=0 --defsym sff=0xff --defsym sffff=0xffff --defsym s80000000=0x80000000 --defsym sffff8000=0xffff8000 --defsym sffffff80=0xffffff80 --defsym sffffffff=0xffffffff
#source: data-reloc-global-rel.s
#objdump: -r -s -j .data
.*: *file format elf32-tic6x-le
Contents of section \.data:
[ \t]*0080 00000080 ffffffff 00000000 feffffff \.\.\.\.\.\.\.\.\.\.\.\.\.\.\.\.
[ \t]*0090 00000000 ffffffff 00800080 ffff8080 \.\.\.\.\.\.\.\.\.\.\.\.\.\.\.\.

21
ld/testsuite/ld-tic6x/data-reloc-global-rel.s Normal file
View File

@ -0,0 +1,21 @@
.globl s0
.globl sff
.globl sffff
.globl s80000000
.globl sffff8000
.globl sffffff80
.globl sffffffff
.data
.word s80000000
.word sffffffff
.word s0
.word sffffffff+0xffffffff
.word s80000000+0x80000000
.short sffffffff
.short sffff
.short sffff8000
.short s0-0x8000
.byte sffffffff
.byte sff
.byte sffffff80
.byte s0-0x80

23
ld/testsuite/ld-tic6x/data-reloc-local-r-rel.d Normal file
View File

@ -0,0 +1,23 @@
#name: C6X data relocations, local symbols, -r, REL
#as: -mlittle-endian -mgenerate-rel
#ld: -r -melf32_tic6x_le
#source: data-reloc-local-1.s
#source: data-reloc-local-2.s
#objdump: -r -s -j .data
.*: *file format elf32-tic6x-le
RELOCATION RECORDS FOR \[\.data\]:
OFFSET TYPE VALUE
0+ R_C6000_ABS32 \.data
0+4 R_C6000_ABS32 \.data
0+8 R_C6000_ABS32 \.data
0+c R_C6000_ABS32 \.data
0+10 R_C6000_ABS16 \.data
0+12 R_C6000_ABS8 \.data
0+13 R_C6000_ABS8 \.data
Contents of section \.data:
[ \t]*0000 00000000 04000000 0c000000 08000000 \.\.\.\.\.\.\.\.\.\.\.\.\.\.\.\.
[ \t]*0010 0c00080c \.\.\.\.

12
ld/testsuite/ld-tic6x/data-reloc-local-rel.d Normal file
View File

@ -0,0 +1,12 @@
#name: C6X data relocations, local symbols, REL
#as: -mlittle-endian -mgenerate-rel
#ld: -melf32_tic6x_le -Tgeneric.ld
#source: data-reloc-local-1.s
#source: data-reloc-local-2.s
#objdump: -r -s -j .data
.*: *file format elf32-tic6x-le
Contents of section \.data:
[ \t]*0080 80000000 84000000 8c000000 88000000 .*
[ \t]*0090 8c00888c .*

20
ld/testsuite/ld-tic6x/mvk-reloc-global-rel.d Normal file
View File

@ -0,0 +1,20 @@
#name: C6X MVK relocations, global symbols, REL
#as: -mlittle-endian -mgenerate-rel
#ld: -melf32_tic6x_le -Tgeneric.ld --defsym s0=0 --defsym s7fff=0x7fff --defsym s80000000=0x80000000 --defsym sffff8000=0xffff8000 --defsym sffffffff=0xffffffff
#source: mvk-reloc-global-rel.s
#objdump: -dr
.*: *file format elf32-tic6x-le
Disassembly of section \.text:
10000000 <[^>]*>:
10000000:[ \t]+00800028[ \t]+mvk \.S1 0,a1
10000004:[ \t]+00ffffa8[ \t]+mvk \.S1 -1,a1
10000008:[ \t]+00800028[ \t]+mvk \.S1 0,a1
1000000c:[ \t]+00ffff28[ \t]+mvk \.S1 -2,a1
10000010:[ \t]+00c00028[ \t]+mvk \.S1 -32768,a1
10000014:[ \t]+00c00028[ \t]+mvk \.S1 -32768,a1
10000018:[ \t]+00bfffa8[ \t]+mvk \.S1 32767,a1
1000001c:[ \t]+00000000[ \t]+nop 1

14
ld/testsuite/ld-tic6x/mvk-reloc-global-rel.s Normal file
View File

@ -0,0 +1,14 @@
.globl s0
.globl s7fff
.globl s80000000
.globl sffff8000
.globl sffffffff
.text
.nocmp
mvkl .S1 s80000000,a1
mvkl .S1 sffffffff,a1
mvkl .S1 s0,a1
mvkl .S1 sffffffff+0xffffffff,a1
mvk .S1 sffff8000,a1
mvk .S1 s0-0x8000,a1
mvk .S1 s7fff,a1

11
ld/testsuite/ld-tic6x/mvk-reloc-local-1-rel.s Normal file
View File

@ -0,0 +1,11 @@
.text
.nocmp
mvk .S1 a,a1
mvkl .S1 b,a2
.data
a:
.word 0
b:
.word 0
c:
.word 0

11
ld/testsuite/ld-tic6x/mvk-reloc-local-2-rel.s Normal file
View File

@ -0,0 +1,11 @@
.text
.nocmp
mvk .S1 d,a1
mvkl .S1 e,a2
.data
d:
.word 0
e:
.word 0
f:
.word 0

23
ld/testsuite/ld-tic6x/mvk-reloc-local-r-rel.d Normal file
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@ -0,0 +1,23 @@
#name: C6X MVK relocations, local symbols, -r, REL
#as: -mlittle-endian -mgenerate-rel
#ld: -r -melf32_tic6x_le
#source: mvk-reloc-local-1-rel.s
#source: mvk-reloc-local-2-rel.s
#objdump: -dr
.*: *file format elf32-tic6x-le
Disassembly of section \.text:
0+ <[^>]*>:
[ \t]*0:[ \t]+00800028[ \t]+mvk \.S1 0,a1
[ \t]*0: R_C6000_ABS_S16[ \t]+\.data
[ \t]*4:[ \t]+01000228[ \t]+mvk \.S1 4,a2
[ \t]*4: R_C6000_ABS_L16[ \t]+\.data
[ \t]*\.\.\.
[ \t]*20:[ \t]+00800628[ \t]+mvk \.S1 12,a1
[ \t]*20: R_C6000_ABS_S16[ \t]+\.data
[ \t]*24:[ \t]+01000828[ \t]+mvk \.S1 16,a2
[ \t]*24: R_C6000_ABS_L16[ \t]+\.data
[ \t]*\.\.\.

19
ld/testsuite/ld-tic6x/mvk-reloc-local-rel.d Normal file
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@ -0,0 +1,19 @@
#name: C6X MVK relocations, local symbols, REL
#as: -mlittle-endian -mgenerate-rel
#ld: -melf32_tic6x_le -Tgeneric.ld
#source: mvk-reloc-local-1-rel.s
#source: mvk-reloc-local-2-rel.s
#objdump: -dr
.*: *file format elf32-tic6x-le
Disassembly of section \.text:
10000000 <[^>]*>:
10000000:[ \t]+00804028[ \t]+mvk \.S1 128,a1
10000004:[ \t]+01004228[ \t]+mvk \.S1 132,a2
[ \t]*\.\.\.
10000020:[ \t]+00804628[ \t]+mvk \.S1 140,a1
10000024:[ \t]+01004828[ \t]+mvk \.S1 144,a2
[ \t]*\.\.\.

20
ld/testsuite/ld-tic6x/pcrel-reloc-global-rel.d Normal file
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@ -0,0 +1,20 @@
#name: C6X PC-relative relocations, global symbols, REL
#as: -mlittle-endian -mgenerate-rel
#ld: -melf32_tic6x_le -Tgeneric.ld --defsym s7a=0x0fffff00 --defsym s7b=0x100000fc --defsym s10a=0x0ffff800 --defsym s10b=0x100007fc --defsym s12a=0x0fffe000 --defsym s12b=0x10001ffc --defsym s21a=0x0fc00000 --defsym s21b=0x103ffffc
#source: pcrel-reloc-global.s
#objdump: -dr
.*: *file format elf32-tic6x-le
Disassembly of section \.text:
10000000 <[^>]*>:
10000000:[ \t]+00c00162[ \t]+addkpc \.S2 fffff00 <[^>]*>,b1,0
10000004:[ \t]+00bf0162[ \t]+addkpc \.S2 100000fc <[^>]*>,b1,0
10000008:[ \t]+08000012[ \t]+b \.S2 fc00000 <[^>]*>
1000000c:[ \t]+07ffff92[ \t]+b \.S2 103ffffc <[^>]*>
10000010:[ \t]+00c01022[ \t]+bdec \.S2 ffff800 <[^>]*>,b1
10000014:[ \t]+00bff022[ \t]+bdec \.S2 100007fc <[^>]*>,b1
10000018:[ \t]+08000122[ \t]+bnop \.S2 fffe000 <[^>]*>,0
1000001c:[ \t]+07ff0122[ \t]+bnop \.S2 10001ffc <[^>]*>,0

62
ld/testsuite/ld-tic6x/pcrel-reloc-local-r-rel.d Normal file
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@ -0,0 +1,62 @@
#name: C6X PC-relative relocations, local symbols, -r, REL
#as: -mlittle-endian -mgenerate-rel
#ld: -r -melf32_tic6x_le
#source: pcrel-reloc-local-1.s
#source: pcrel-reloc-local-2.s
#objdump: -dr
.*: *file format elf32-tic6x-le
Disassembly of section \.text:
0+ <[^>]*>:
[ \t]*0:[ \t]+00000000[ \t]+nop 1
[ \t]*4:[ \t]+00800162[ \t]+addkpc \.S2 0 <[^>]*>,b1,0
[ \t]*4: R_C6000_PCR_S7[ \t]+\.text\.1
[ \t]*8:[ \t]+00810162[ \t]+addkpc \.S2 4 <[^>]*>,b1,0
[ \t]*8: R_C6000_PCR_S7[ \t]+\.text\.1
[ \t]*c:[ \t]+00000012[ \t]+b \.S2 0 <[^>]*>
[ \t]*c: R_C6000_PCR_S21[ \t]+\.text\.1
[ \t]*10:[ \t]+00000092[ \t]+b \.S2 4 <[^>]*>
[ \t]*10: R_C6000_PCR_S21[ \t]+\.text\.1
[ \t]*14:[ \t]+00801022[ \t]+bdec \.S2 0 <[^>]*>,b1
[ \t]*14: R_C6000_PCR_S10[ \t]+\.text\.1
[ \t]*18:[ \t]+00803022[ \t]+bdec \.S2 4 <[^>]*>,b1
[ \t]*18: R_C6000_PCR_S10[ \t]+\.text\.1
[ \t]*1c:[ \t]+00000122[ \t]+bnop \.S2 0 <[^>]*>,0
[ \t]*1c: R_C6000_PCR_S12[ \t]+\.text\.1
[ \t]*20:[ \t]+00010122[ \t]+bnop \.S2 24 <[^>]*>,0
[ \t]*20: R_C6000_PCR_S12[ \t]+\.text\.1
[ \t]*\.\.\.
[ \t]*44:[ \t]+00080122[ \t]+bnop \.S2 60 <[^>]*>,0
[ \t]*44: R_C6000_PCR_S12[ \t]+\.text\.1
[ \t]*48:[ \t]+00090122[ \t]+bnop \.S2 64 <[^>]*>,0
[ \t]*48: R_C6000_PCR_S12[ \t]+\.text\.1
[ \t]*4c:[ \t]+00811022[ \t]+bdec \.S2 60 <[^>]*>,b1
[ \t]*4c: R_C6000_PCR_S10[ \t]+\.text\.1
[ \t]*50:[ \t]+00813022[ \t]+bdec \.S2 64 <[^>]*>,b1
[ \t]*50: R_C6000_PCR_S10[ \t]+\.text\.1
[ \t]*54:[ \t]+00000412[ \t]+b \.S2 60 <[^>]*>
[ \t]*54: R_C6000_PCR_S21[ \t]+\.text\.1
[ \t]*58:[ \t]+00000492[ \t]+b \.S2 64 <[^>]*>
[ \t]*58: R_C6000_PCR_S21[ \t]+\.text\.1
[ \t]*5c:[ \t]+00880162[ \t]+addkpc \.S2 60 <[^>]*>,b1,0
[ \t]*5c: R_C6000_PCR_S7[ \t]+\.text\.1
[ \t]*60:[ \t]+00890162[ \t]+addkpc \.S2 84 <[^>]*>,b1,0
[ \t]*60: R_C6000_PCR_S7[ \t]+\.text\.1
[ \t]*\.\.\.
Disassembly of section \.text\.1:
0+ <[^>]*>:
[ \t]*0:[ \t]+00000000[ \t]+nop 1
0+4 <[^>]*>:
[ \t]*\.\.\.
0+20 <[^>]*>:
[ \t]*20:[ \t]+00000000[ \t]+nop 1
0+24 <[^>]*>:
[ \t]*\.\.\.

44
ld/testsuite/ld-tic6x/pcrel-reloc-local-rel.d Normal file
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@ -0,0 +1,44 @@
#name: C6X PC-relative relocations, local symbols, REL
#as: -mlittle-endian -mgenerate-rel
#ld: -melf32_tic6x_le -Tgeneric.ld
#source: pcrel-reloc-local-1.s
#source: pcrel-reloc-local-2.s
#objdump: -dr
.*: *file format elf32-tic6x-le
Disassembly of section \.text:
10000000 <[^>]*>:
10000000:[ \t]+00000000[ \t]+nop 1
10000004:[ \t]+00900162[ \t]+addkpc \.S2 10000040 <[^>]*>,b1,0
10000008:[ \t]+00910162[ \t]+addkpc \.S2 10000044 <[^>]*>,b1,0
1000000c:[ \t]+00000812[ \t]+b \.S2 10000040 <[^>]*>
10000010:[ \t]+00000892[ \t]+b \.S2 10000044 <[^>]*>
10000014:[ \t]+00821022[ \t]+bdec \.S2 10000040 <[^>]*>,b1
10000018:[ \t]+00823022[ \t]+bdec \.S2 10000044 <[^>]*>,b1
1000001c:[ \t]+00100122[ \t]+bnop \.S2 10000040 <[^>]*>,0
10000020:[ \t]+00090122[ \t]+bnop \.S2 10000044 <[^>]*>,0
[ \t]*\.\.\.
10000040 <[^>]*>:
10000040:[ \t]+00000000[ \t]+nop 1
10000044 <[^>]*>:
[ \t]*\.\.\.
10000064:[ \t]+00100122[ \t]+bnop \.S2 100000a0 <[^>]*>,0
10000068:[ \t]+00110122[ \t]+bnop \.S2 100000a4 <[^>]*>,0
1000006c:[ \t]+00821022[ \t]+bdec \.S2 100000a0 <[^>]*>,b1
10000070:[ \t]+00823022[ \t]+bdec \.S2 100000a4 <[^>]*>,b1
10000074:[ \t]+00000812[ \t]+b \.S2 100000a0 <[^>]*>
10000078:[ \t]+00000892[ \t]+b \.S2 100000a4 <[^>]*>
1000007c:[ \t]+00900162[ \t]+addkpc \.S2 100000a0 <[^>]*>,b1,0
10000080:[ \t]+00890162[ \t]+addkpc \.S2 100000a4 <[^>]*>,b1,0
[ \t]*\.\.\.
100000a0 <[^>]*>:
100000a0:[ \t]+00000000[ \t]+nop 1
100000a4 <[^>]*>:
[ \t]*\.\.\.

24
ld/testsuite/ld-tic6x/sbr-reloc-global-rel.d Normal file
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@ -0,0 +1,24 @@
#name: C6X SB-relative relocations, global symbols, REL
#as: -mlittle-endian -mgenerate-rel
#ld: -melf32_tic6x_le -Tsbr.ld --defsym sw1=0x80 --defsym sw2=0x2007c --defsym sh1=0x80 --defsym sh2=0x1007e --defsym sb1=0x80 --defsym sb2=0x807f --defsym sb16a=0xffff8080 --defsym sb16b=0x807f --defsym sbw=0x123456f8 --defsym shw=0x2468ad70 --defsym sww=0x48d15a60
#source: sbr-reloc-global-rel.s
#objdump: -dr
.*: *file format elf32-tic6x-le
Disassembly of section \.text:
10000000 <[^>]*>:
10000000:[ \t]+0080006e[ \t]+ldw \.D2T2 \*\+b14\(0\),b1
10000004:[ \t]+00ffff6e[ \t]+ldw \.D2T2 \*\+b14\(131068\),b1
10000008:[ \t]+0080004e[ \t]+ldh \.D2T2 \*\+b14\(0\),b1
1000000c:[ \t]+00ffff4e[ \t]+ldh \.D2T2 \*\+b14\(65534\),b1
10000010:[ \t]+0080002e[ \t]+ldb \.D2T2 \*\+b14\(0\),b1
10000014:[ \t]+00ffff2e[ \t]+ldb \.D2T2 \*\+b14\(32767\),b1
10000018:[ \t]+00c00028[ \t]+mvk \.S1 -32768,a1
1000001c:[ \t]+00bfffa8[ \t]+mvk \.S1 32767,a1
10000020:[ \t]+00ab3c28[ \t]+mvk \.S1 22136,a1
10000024:[ \t]+00ab3c28[ \t]+mvk \.S1 22136,a1
10000028:[ \t]+00ab3c28[ \t]+mvk \.S1 22136,a1
[ \t]*\.\.\.

24
ld/testsuite/ld-tic6x/sbr-reloc-global-rel.s Normal file
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@ -0,0 +1,24 @@
.globl sw1
.globl sw2
.globl sh1
.globl sh2
.globl sb1
.globl sb2
.globl sb16a
.globl sb16b
.globl sbw
.globl shw
.globl sww
.text
.nocmp
ldw .D2T2 *+b14(sw1),b1
ldw .D2T2 *+b14(sw2),b1
ldh .D2T2 *+b14(sh1),b1
ldh .D2T2 *+b14(sh2),b1
ldb .D2T2 *+b14(sb1),b1
ldb .D2T2 *+b14(sb2),b1
mvk .S1 $dpr_byte(sb16a),a1
mvk .S1 $dpr_byte(sb16b),a1
mvkl .S1 $dpr_byte(sbw),a1
mvkl .S1 $dpr_hword(shw),a1
mvkl .S1 $dpr_word(sww),a1

21
ld/testsuite/ld-tic6x/sbr-reloc-local-1-rel.s Normal file
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@ -0,0 +1,21 @@
.text
.nocmp
ldw .D2T2 *+b14(a),b1
ldw .D2T2 *+b14(b),b1
ldh .D2T2 *+b14(b),b1
ldh .D2T2 *+b14(c),b1
ldb .D2T2 *+b14(c),b1
ldb .D2T2 *+b14(d),b1
mvk .S1 $dpr_byte(d),a1
mvkl .S1 $dpr_byte(c),a1
mvkl .S1 $dpr_hword(b),a1
mvkl .S1 $dpr_word(a),a1
.data
a:
.word 0
b:
.short 0
c:
.byte 0
d:
.byte 0

21
ld/testsuite/ld-tic6x/sbr-reloc-local-2-rel.s Normal file
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@ -0,0 +1,21 @@
.text
.nocmp
ldw .D2T2 *+b14(e),b1
ldw .D2T2 *+b14(f),b1
ldh .D2T2 *+b14(f),b1
ldh .D2T2 *+b14(g),b1
ldb .D2T2 *+b14(g),b1
ldb .D2T2 *+b14(h),b1
mvk .S1 $dpr_byte(h),a1
mvkl .S1 $dpr_byte(g),a1
mvkl .S1 $dpr_hword(f),a1
mvkl .S1 $dpr_word(e),a1
.data
e:
.word 0
f:
.short 0
g:
.byte 0
h:
.byte 0

55
ld/testsuite/ld-tic6x/sbr-reloc-local-r-rel.d Normal file
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@ -0,0 +1,55 @@
#name: C6X SB-relative relocations, local symbols, -r, REL
#as: -mlittle-endian -mgenerate-rel
#ld: -r -melf32_tic6x_le
#source: sbr-reloc-local-1-rel.s
#source: sbr-reloc-local-2-rel.s
#objdump: -dr
.*: *file format elf32-tic6x-le
Disassembly of section \.text:
0+ <[^>]*>:
[ \t]*0:[ \t]+0080006e[ \t]+ldw \.D2T2 \*\+b14\(0\),b1
[ \t]*0: R_C6000_SBR_U15_W[ \t]+\.data
[ \t]*4:[ \t]+0080016e[ \t]+ldw \.D2T2 \*\+b14\(4\),b1
[ \t]*4: R_C6000_SBR_U15_W[ \t]+\.data
[ \t]*8:[ \t]+0080024e[ \t]+ldh \.D2T2 \*\+b14\(4\),b1
[ \t]*8: R_C6000_SBR_U15_H[ \t]+\.data
[ \t]*c:[ \t]+0080034e[ \t]+ldh \.D2T2 \*\+b14\(6\),b1
[ \t]*c: R_C6000_SBR_U15_H[ \t]+\.data
[ \t]*10:[ \t]+0080062e[ \t]+ldb \.D2T2 \*\+b14\(6\),b1
[ \t]*10: R_C6000_SBR_U15_B[ \t]+\.data
[ \t]*14:[ \t]+0080072e[ \t]+ldb \.D2T2 \*\+b14\(7\),b1
[ \t]*14: R_C6000_SBR_U15_B[ \t]+\.data
[ \t]*18:[ \t]+008003a8[ \t]+mvk \.S1 7,a1
[ \t]*18: R_C6000_SBR_S16[ \t]+\.data
[ \t]*1c:[ \t]+00800328[ \t]+mvk \.S1 6,a1
[ \t]*1c: R_C6000_SBR_L16_B[ \t]+\.data
[ \t]*20:[ \t]+00800128[ \t]+mvk \.S1 2,a1
[ \t]*20: R_C6000_SBR_L16_H[ \t]+\.data
[ \t]*24:[ \t]+00800028[ \t]+mvk \.S1 0,a1
[ \t]*24: R_C6000_SBR_L16_W[ \t]+\.data
[ \t]*\.\.\.
[ \t]*40:[ \t]+0080026e[ \t]+ldw \.D2T2 \*\+b14\(8\),b1
[ \t]*40: R_C6000_SBR_U15_W[ \t]+\.data
[ \t]*44:[ \t]+0080036e[ \t]+ldw \.D2T2 \*\+b14\(12\),b1
[ \t]*44: R_C6000_SBR_U15_W[ \t]+\.data
[ \t]*48:[ \t]+0080064e[ \t]+ldh \.D2T2 \*\+b14\(12\),b1
[ \t]*48: R_C6000_SBR_U15_H[ \t]+\.data
[ \t]*4c:[ \t]+0080074e[ \t]+ldh \.D2T2 \*\+b14\(14\),b1
[ \t]*4c: R_C6000_SBR_U15_H[ \t]+\.data
[ \t]*50:[ \t]+00800e2e[ \t]+ldb \.D2T2 \*\+b14\(14\),b1
[ \t]*50: R_C6000_SBR_U15_B[ \t]+\.data
[ \t]*54:[ \t]+00800f2e[ \t]+ldb \.D2T2 \*\+b14\(15\),b1
[ \t]*54: R_C6000_SBR_U15_B[ \t]+\.data
[ \t]*58:[ \t]+008007a8[ \t]+mvk \.S1 15,a1
[ \t]*58: R_C6000_SBR_S16[ \t]+\.data
[ \t]*5c:[ \t]+00800728[ \t]+mvk \.S1 14,a1
[ \t]*5c: R_C6000_SBR_L16_B[ \t]+\.data
[ \t]*60:[ \t]+00800328[ \t]+mvk \.S1 6,a1
[ \t]*60: R_C6000_SBR_L16_H[ \t]+\.data
[ \t]*64:[ \t]+00800128[ \t]+mvk \.S1 2,a1
[ \t]*64: R_C6000_SBR_L16_W[ \t]+\.data
[ \t]*\.\.\.

35
ld/testsuite/ld-tic6x/sbr-reloc-local-rel.d Normal file
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@ -0,0 +1,35 @@
#name: C6X SB-relative relocations, local symbols, REL
#as: -mlittle-endian -mgenerate-rel
#ld: -melf32_tic6x_le -Tsbr.ld
#source: sbr-reloc-local-1-rel.s
#source: sbr-reloc-local-2-rel.s
#objdump: -dr
.*: *file format elf32-tic6x-le
Disassembly of section \.text:
10000000 <[^>]*>:
10000000:[ \t]+0080006e[ \t]+ldw \.D2T2 \*\+b14\(0\),b1
10000004:[ \t]+0080016e[ \t]+ldw \.D2T2 \*\+b14\(4\),b1
10000008:[ \t]+0080024e[ \t]+ldh \.D2T2 \*\+b14\(4\),b1
1000000c:[ \t]+0080034e[ \t]+ldh \.D2T2 \*\+b14\(6\),b1
10000010:[ \t]+0080062e[ \t]+ldb \.D2T2 \*\+b14\(6\),b1
10000014:[ \t]+0080072e[ \t]+ldb \.D2T2 \*\+b14\(7\),b1
10000018:[ \t]+008003a8[ \t]+mvk \.S1 7,a1
1000001c:[ \t]+00800328[ \t]+mvk \.S1 6,a1
10000020:[ \t]+00800128[ \t]+mvk \.S1 2,a1
10000024:[ \t]+00800028[ \t]+mvk \.S1 0,a1
[ \t]*\.\.\.
10000040:[ \t]+0080026e[ \t]+ldw \.D2T2 \*\+b14\(8\),b1
10000044:[ \t]+0080036e[ \t]+ldw \.D2T2 \*\+b14\(12\),b1
10000048:[ \t]+0080064e[ \t]+ldh \.D2T2 \*\+b14\(12\),b1
1000004c:[ \t]+0080074e[ \t]+ldh \.D2T2 \*\+b14\(14\),b1
10000050:[ \t]+00800e2e[ \t]+ldb \.D2T2 \*\+b14\(14\),b1
10000054:[ \t]+00800f2e[ \t]+ldb \.D2T2 \*\+b14\(15\),b1
10000058:[ \t]+008007a8[ \t]+mvk \.S1 15,a1
1000005c:[ \t]+00800728[ \t]+mvk \.S1 14,a1
10000060:[ \t]+00800328[ \t]+mvk \.S1 6,a1
10000064:[ \t]+00800128[ \t]+mvk \.S1 2,a1
[ \t]*\.\.\.