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opcodes int vs bfd_boolean fixes

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cpu/
	* frv.opc (frv_is_branch_major, frv_is_float_major),
	(frv_is_media_major, frv_is_branch_insn, frv_is_float_insn),
	(frv_is_media_insn, spr_valid): Correct prototypes.
include/
	* opcode/aarch64.h (aarch64_opcode_encode): Correct prototype.
opcodes/
	* arc-dis.c (extract_operand_value): Correct NULL cast.
	* frv-opc.h: Regenerate.
This commit is contained in:
Alan Modra 2021-03-29 09:44:48 +10:30
parent f4f9ede042
commit 3d7d6c1b50
7 changed files with 35 additions and 20 deletions
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6
cpu/ChangeLog
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@ -1,3 +1,9 @@
2021-03-29 Alan Modra <amodra@gmail.com>
* frv.opc (frv_is_branch_major, frv_is_float_major),
(frv_is_media_major, frv_is_branch_insn, frv_is_float_insn),
(frv_is_media_insn, spr_valid): Correct prototypes.
2021-01-09 Nick Clifton <nickc@redhat.com> 2021-01-09 Nick Clifton <nickc@redhat.com>
* 2.36 release branch crated. * 2.36 release branch crated.

18
cpu/frv.opc
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@ -66,15 +66,15 @@ typedef struct
const CGEN_INSN * insn[FRV_VLIW_SIZE]; const CGEN_INSN * insn[FRV_VLIW_SIZE];
} FRV_VLIW; } FRV_VLIW;
int frv_is_branch_major (CGEN_ATTR_VALUE_ENUM_TYPE, unsigned long); bfd_boolean frv_is_branch_major (CGEN_ATTR_VALUE_ENUM_TYPE, unsigned long);
int frv_is_float_major (CGEN_ATTR_VALUE_ENUM_TYPE, unsigned long); bfd_boolean frv_is_float_major (CGEN_ATTR_VALUE_ENUM_TYPE, unsigned long);
int frv_is_media_major (CGEN_ATTR_VALUE_ENUM_TYPE, unsigned long); bfd_boolean frv_is_media_major (CGEN_ATTR_VALUE_ENUM_TYPE, unsigned long);
int frv_is_branch_insn (const CGEN_INSN *); bfd_boolean frv_is_branch_insn (const CGEN_INSN *);
int frv_is_float_insn (const CGEN_INSN *); bfd_boolean frv_is_float_insn (const CGEN_INSN *);
int frv_is_media_insn (const CGEN_INSN *); bfd_boolean frv_is_media_insn (const CGEN_INSN *);
void frv_vliw_reset (FRV_VLIW *, unsigned long, unsigned long); void frv_vliw_reset (FRV_VLIW *, unsigned long, unsigned long);
int frv_vliw_add_insn (FRV_VLIW *, const CGEN_INSN *); int frv_vliw_add_insn (FRV_VLIW *, const CGEN_INSN *);
int spr_valid (long); bfd_boolean spr_valid (long);
/* -- */ /* -- */
/* -- opc.c */ /* -- opc.c */

4
include/ChangeLog
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@ -1,3 +1,7 @@
2021-03-29 Alan Modra <amodra@gmail.com>
* opcode/aarch64.h (aarch64_opcode_encode): Correct prototype.
2021-03-25 Nick Alcock <nick.alcock@oracle.com> 2021-03-25 Nick Alcock <nick.alcock@oracle.com>
PR libctf/27628 PR libctf/27628

2
include/opcode/aarch64.h
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@ -1264,7 +1264,7 @@ struct aarch64_instr_sequence
/* Encoding entrypoint. */ /* Encoding entrypoint. */
extern int extern bfd_boolean
aarch64_opcode_encode (const aarch64_opcode *, const aarch64_inst *, aarch64_opcode_encode (const aarch64_opcode *, const aarch64_inst *,
aarch64_insn *, aarch64_opnd_qualifier_t *, aarch64_insn *, aarch64_opnd_qualifier_t *,
aarch64_operand_error *, aarch64_instr_sequence *); aarch64_operand_error *, aarch64_instr_sequence *);

5
opcodes/ChangeLog
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@ -1,3 +1,8 @@
2021-03-29 Alan Modra <amodra@gmail.com>
* arc-dis.c (extract_operand_value): Correct NULL cast.
* frv-opc.h: Regenerate.
2021-03-26 Jan Beulich <jbeulich@suse.com> 2021-03-26 Jan Beulich <jbeulich@suse.com>
* i386-opc.tbl (movq): Add CpuSSE2 to SSE2 form. Add CpuMMX to * i386-opc.tbl (movq): Add CpuSSE2 to SSE2 form. Add CpuMMX to

2
opcodes/arc-dis.c
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@ -694,7 +694,7 @@ extract_operand_value (const struct arc_operand *operand,
else else
{ {
if (operand->extract) if (operand->extract)
value = (*operand->extract) (insn, (int *) NULL); value = (*operand->extract) (insn, (bfd_boolean *) NULL);
else else
{ {
if (operand->flags & ARC_OPERAND_ALIGNED32) if (operand->flags & ARC_OPERAND_ALIGNED32)

18
opcodes/frv-opc.h
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@ -58,15 +58,15 @@ typedef struct
const CGEN_INSN * insn[FRV_VLIW_SIZE]; const CGEN_INSN * insn[FRV_VLIW_SIZE];
} FRV_VLIW; } FRV_VLIW;
int frv_is_branch_major (CGEN_ATTR_VALUE_ENUM_TYPE, unsigned long); bfd_boolean frv_is_branch_major (CGEN_ATTR_VALUE_ENUM_TYPE, unsigned long);
int frv_is_float_major (CGEN_ATTR_VALUE_ENUM_TYPE, unsigned long); bfd_boolean frv_is_float_major (CGEN_ATTR_VALUE_ENUM_TYPE, unsigned long);
int frv_is_media_major (CGEN_ATTR_VALUE_ENUM_TYPE, unsigned long); bfd_boolean frv_is_media_major (CGEN_ATTR_VALUE_ENUM_TYPE, unsigned long);
int frv_is_branch_insn (const CGEN_INSN *); bfd_boolean frv_is_branch_insn (const CGEN_INSN *);
int frv_is_float_insn (const CGEN_INSN *); bfd_boolean frv_is_float_insn (const CGEN_INSN *);
int frv_is_media_insn (const CGEN_INSN *); bfd_boolean frv_is_media_insn (const CGEN_INSN *);
void frv_vliw_reset (FRV_VLIW *, unsigned long, unsigned long); void frv_vliw_reset (FRV_VLIW *, unsigned long, unsigned long);
int frv_vliw_add_insn (FRV_VLIW *, const CGEN_INSN *); int frv_vliw_add_insn (FRV_VLIW *, const CGEN_INSN *);
int spr_valid (long); bfd_boolean spr_valid (long);
/* -- */ /* -- */
/* Enum declaration for frv instruction types. */ /* Enum declaration for frv instruction types. */
typedef enum cgen_insn_type { typedef enum cgen_insn_type {