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PowerPC reloc symbols that shouldn't be adjusted

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GOT and PLT relocs shouldn't have their symbols replaced with a
section symbol plus added.  Nor should the HIGHA TLS relocations,
which failed to be caught by the range test in ppc_fix_adjustable.

bfd/
	* reloc.c (BFD_RELOC_PPC64_TPREL16_HIGH, BFD_RELOC_PPC64_TPREL16_HIGHA),
	(BFD_RELOC_PPC64_DTPREL16_HIGH, BFD_RELOC_PPC64_DTPREL16_HIGHA):
	Sort before BFD_RELOC_PPC64_DTPREL16_HIGHESTA entry.
gas/
	* config/tc-ppc.c (ppc_fix_adjustable): Exclude all GOT and PLT
	relocs, and VLE sdarel relocs.
	* testsuite/gas/ppc/power4.d: Adjust.
This commit is contained in:
Alan Modra 2019-05-06 08:43:32 +09:30
parent 62e6b7b3b3
commit 334d91b940
7 changed files with 51 additions and 17 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

8
bfd/ChangeLog
View File

@ -1,3 +1,11 @@
2019-05-06 Alan Modra <amodra@gmail.com>
* reloc.c (BFD_RELOC_PPC64_TPREL16_HIGH, BFD_RELOC_PPC64_TPREL16_HIGHA),
(BFD_RELOC_PPC64_DTPREL16_HIGH, BFD_RELOC_PPC64_DTPREL16_HIGHA):
Sort before BFD_RELOC_PPC64_DTPREL16_HIGHESTA entry.
* libbfd.h: Regenerate.
* bfd-in2.h: Regenerate.
2019-05-04 Alan Modra <amodra@gmail.com> 2019-05-04 Alan Modra <amodra@gmail.com>
PR 24511 PR 24511

8
bfd/bfd-in2.h
View File

@ -3521,20 +3521,20 @@ instruction. */
BFD_RELOC_PPC_GOT_DTPREL16_HA, BFD_RELOC_PPC_GOT_DTPREL16_HA,
BFD_RELOC_PPC64_TPREL16_DS, BFD_RELOC_PPC64_TPREL16_DS,
BFD_RELOC_PPC64_TPREL16_LO_DS, BFD_RELOC_PPC64_TPREL16_LO_DS,
BFD_RELOC_PPC64_TPREL16_HIGH,
BFD_RELOC_PPC64_TPREL16_HIGHA,
BFD_RELOC_PPC64_TPREL16_HIGHER, BFD_RELOC_PPC64_TPREL16_HIGHER,
BFD_RELOC_PPC64_TPREL16_HIGHERA, BFD_RELOC_PPC64_TPREL16_HIGHERA,
BFD_RELOC_PPC64_TPREL16_HIGHEST, BFD_RELOC_PPC64_TPREL16_HIGHEST,
BFD_RELOC_PPC64_TPREL16_HIGHESTA, BFD_RELOC_PPC64_TPREL16_HIGHESTA,
BFD_RELOC_PPC64_DTPREL16_DS, BFD_RELOC_PPC64_DTPREL16_DS,
BFD_RELOC_PPC64_DTPREL16_LO_DS, BFD_RELOC_PPC64_DTPREL16_LO_DS,
BFD_RELOC_PPC64_DTPREL16_HIGH,
BFD_RELOC_PPC64_DTPREL16_HIGHA,
BFD_RELOC_PPC64_DTPREL16_HIGHER, BFD_RELOC_PPC64_DTPREL16_HIGHER,
BFD_RELOC_PPC64_DTPREL16_HIGHERA, BFD_RELOC_PPC64_DTPREL16_HIGHERA,
BFD_RELOC_PPC64_DTPREL16_HIGHEST, BFD_RELOC_PPC64_DTPREL16_HIGHEST,
BFD_RELOC_PPC64_DTPREL16_HIGHESTA, BFD_RELOC_PPC64_DTPREL16_HIGHESTA,
BFD_RELOC_PPC64_TPREL16_HIGH,
BFD_RELOC_PPC64_TPREL16_HIGHA,
BFD_RELOC_PPC64_DTPREL16_HIGH,
BFD_RELOC_PPC64_DTPREL16_HIGHA,
/* IBM 370/390 relocations */ /* IBM 370/390 relocations */
BFD_RELOC_I370_D12, BFD_RELOC_I370_D12,

8
bfd/libbfd.h
View File

@ -1508,20 +1508,20 @@ static const char *const bfd_reloc_code_real_names[] = { "@@uninitialized@@",
"BFD_RELOC_PPC_GOT_DTPREL16_HA", "BFD_RELOC_PPC_GOT_DTPREL16_HA",
"BFD_RELOC_PPC64_TPREL16_DS", "BFD_RELOC_PPC64_TPREL16_DS",
"BFD_RELOC_PPC64_TPREL16_LO_DS", "BFD_RELOC_PPC64_TPREL16_LO_DS",
"BFD_RELOC_PPC64_TPREL16_HIGH",
"BFD_RELOC_PPC64_TPREL16_HIGHA",
"BFD_RELOC_PPC64_TPREL16_HIGHER", "BFD_RELOC_PPC64_TPREL16_HIGHER",
"BFD_RELOC_PPC64_TPREL16_HIGHERA", "BFD_RELOC_PPC64_TPREL16_HIGHERA",
"BFD_RELOC_PPC64_TPREL16_HIGHEST", "BFD_RELOC_PPC64_TPREL16_HIGHEST",
"BFD_RELOC_PPC64_TPREL16_HIGHESTA", "BFD_RELOC_PPC64_TPREL16_HIGHESTA",
"BFD_RELOC_PPC64_DTPREL16_DS", "BFD_RELOC_PPC64_DTPREL16_DS",
"BFD_RELOC_PPC64_DTPREL16_LO_DS", "BFD_RELOC_PPC64_DTPREL16_LO_DS",
"BFD_RELOC_PPC64_DTPREL16_HIGH",
"BFD_RELOC_PPC64_DTPREL16_HIGHA",
"BFD_RELOC_PPC64_DTPREL16_HIGHER", "BFD_RELOC_PPC64_DTPREL16_HIGHER",
"BFD_RELOC_PPC64_DTPREL16_HIGHERA", "BFD_RELOC_PPC64_DTPREL16_HIGHERA",
"BFD_RELOC_PPC64_DTPREL16_HIGHEST", "BFD_RELOC_PPC64_DTPREL16_HIGHEST",
"BFD_RELOC_PPC64_DTPREL16_HIGHESTA", "BFD_RELOC_PPC64_DTPREL16_HIGHESTA",
"BFD_RELOC_PPC64_TPREL16_HIGH",
"BFD_RELOC_PPC64_TPREL16_HIGHA",
"BFD_RELOC_PPC64_DTPREL16_HIGH",
"BFD_RELOC_PPC64_DTPREL16_HIGHA",
"BFD_RELOC_I370_D12", "BFD_RELOC_I370_D12",
"BFD_RELOC_CTOR", "BFD_RELOC_CTOR",
"BFD_RELOC_ARM_PCREL_BRANCH", "BFD_RELOC_ARM_PCREL_BRANCH",

16
bfd/reloc.c
View File

@ -2945,6 +2945,10 @@ ENUMX
BFD_RELOC_PPC64_TPREL16_DS BFD_RELOC_PPC64_TPREL16_DS
ENUMX ENUMX
BFD_RELOC_PPC64_TPREL16_LO_DS BFD_RELOC_PPC64_TPREL16_LO_DS
ENUMX
BFD_RELOC_PPC64_TPREL16_HIGH
ENUMX
BFD_RELOC_PPC64_TPREL16_HIGHA
ENUMX ENUMX
BFD_RELOC_PPC64_TPREL16_HIGHER BFD_RELOC_PPC64_TPREL16_HIGHER
ENUMX ENUMX
@ -2957,6 +2961,10 @@ ENUMX
BFD_RELOC_PPC64_DTPREL16_DS BFD_RELOC_PPC64_DTPREL16_DS
ENUMX ENUMX
BFD_RELOC_PPC64_DTPREL16_LO_DS BFD_RELOC_PPC64_DTPREL16_LO_DS
ENUMX
BFD_RELOC_PPC64_DTPREL16_HIGH
ENUMX
BFD_RELOC_PPC64_DTPREL16_HIGHA
ENUMX ENUMX
BFD_RELOC_PPC64_DTPREL16_HIGHER BFD_RELOC_PPC64_DTPREL16_HIGHER
ENUMX ENUMX
@ -2965,14 +2973,6 @@ ENUMX
BFD_RELOC_PPC64_DTPREL16_HIGHEST BFD_RELOC_PPC64_DTPREL16_HIGHEST
ENUMX ENUMX
BFD_RELOC_PPC64_DTPREL16_HIGHESTA BFD_RELOC_PPC64_DTPREL16_HIGHESTA
ENUMX
BFD_RELOC_PPC64_TPREL16_HIGH
ENUMX
BFD_RELOC_PPC64_TPREL16_HIGHA
ENUMX
BFD_RELOC_PPC64_DTPREL16_HIGH
ENUMX
BFD_RELOC_PPC64_DTPREL16_HIGHA
ENUMDOC ENUMDOC
PowerPC and PowerPC64 thread-local storage relocations. PowerPC and PowerPC64 thread-local storage relocations.

6
gas/ChangeLog
View File

@ -1,3 +1,9 @@
2019-05-06 Alan Modra <amodra@gmail.com>
* config/tc-ppc.c (ppc_fix_adjustable): Exclude all GOT and PLT
relocs, and VLE sdarel relocs.
* testsuite/gas/ppc/power4.d: Adjust.
2019-05-05 Alexandre Oliva <aoliva@redhat.com> 2019-05-05 Alexandre Oliva <aoliva@redhat.com>
* dwarf2dbg.c (set_or_check_view): Skip heads when assigning * dwarf2dbg.c (set_or_check_view): Skip heads when assigning

20
gas/config/tc-ppc.c
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@ -6765,7 +6765,27 @@ ppc_fix_adjustable (fixS *fix)
&& fix->fx_r_type != BFD_RELOC_HI16_S_GOTOFF && fix->fx_r_type != BFD_RELOC_HI16_S_GOTOFF
&& fix->fx_r_type != BFD_RELOC_PPC64_GOT16_DS && fix->fx_r_type != BFD_RELOC_PPC64_GOT16_DS
&& fix->fx_r_type != BFD_RELOC_PPC64_GOT16_LO_DS && fix->fx_r_type != BFD_RELOC_PPC64_GOT16_LO_DS
&& fix->fx_r_type != BFD_RELOC_16_GOT_PCREL
&& fix->fx_r_type != BFD_RELOC_32_GOTOFF
&& fix->fx_r_type != BFD_RELOC_24_PLT_PCREL
&& fix->fx_r_type != BFD_RELOC_32_PLTOFF
&& fix->fx_r_type != BFD_RELOC_32_PLT_PCREL
&& fix->fx_r_type != BFD_RELOC_LO16_PLTOFF
&& fix->fx_r_type != BFD_RELOC_HI16_PLTOFF
&& fix->fx_r_type != BFD_RELOC_HI16_S_PLTOFF
&& fix->fx_r_type != BFD_RELOC_64_PLTOFF
&& fix->fx_r_type != BFD_RELOC_64_PLT_PCREL
&& fix->fx_r_type != BFD_RELOC_PPC64_PLT16_LO_DS
&& fix->fx_r_type != BFD_RELOC_PPC64_PLTGOT16
&& fix->fx_r_type != BFD_RELOC_PPC64_PLTGOT16_LO
&& fix->fx_r_type != BFD_RELOC_PPC64_PLTGOT16_HI
&& fix->fx_r_type != BFD_RELOC_PPC64_PLTGOT16_HA
&& fix->fx_r_type != BFD_RELOC_PPC64_PLTGOT16_DS
&& fix->fx_r_type != BFD_RELOC_PPC64_PLTGOT16_LO_DS
&& fix->fx_r_type != BFD_RELOC_GPREL16 && fix->fx_r_type != BFD_RELOC_GPREL16
&& fix->fx_r_type != BFD_RELOC_PPC_VLE_SDAREL_LO16A
&& fix->fx_r_type != BFD_RELOC_PPC_VLE_SDAREL_HI16A
&& fix->fx_r_type != BFD_RELOC_PPC_VLE_SDAREL_HA16A
&& fix->fx_r_type != BFD_RELOC_VTABLE_INHERIT && fix->fx_r_type != BFD_RELOC_VTABLE_INHERIT
&& fix->fx_r_type != BFD_RELOC_VTABLE_ENTRY && fix->fx_r_type != BFD_RELOC_VTABLE_ENTRY
&& !(fix->fx_r_type >= BFD_RELOC_PPC_TLS && !(fix->fx_r_type >= BFD_RELOC_PPC_TLS

2
gas/testsuite/gas/ppc/power4.d
View File

@ -57,7 +57,7 @@ Disassembly of section \.text:
.*: (e0 c3 00 00|00 00 c3 e0) lq r6,0\(r3\) .*: (e0 c3 00 00|00 00 c3 e0) lq r6,0\(r3\)
.*: R_PPC64_GOT16_LO_DS dsym0 .*: R_PPC64_GOT16_LO_DS dsym0
.*: (e0 c3 00 00|00 00 c3 e0) lq r6,0\(r3\) .*: (e0 c3 00 00|00 00 c3 e0) lq r6,0\(r3\)
.*: R_PPC64_PLT16_LO_DS \.data .*: R_PPC64_PLT16_LO_DS dsym0
.*: (e0 c3 00 .0|.0 00 c3 e0) lq r6,.*\(r3\) .*: (e0 c3 00 .0|.0 00 c3 e0) lq r6,.*\(r3\)
.*: R_PPC64_SECTOFF_DS \.data\+0x10 .*: R_PPC64_SECTOFF_DS \.data\+0x10
.*: (e0 c3 00 .0|.0 00 c3 e0) lq r6,.*\(r3\) .*: (e0 c3 00 .0|.0 00 c3 e0) lq r6,.*\(r3\)