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x86-64: Display eiz for address with the addr32 prefix

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In 64-bit mode, display eiz for address with the addr32 prefix and without
base nor index registers.  For

	mov -0xccddef(,%eiz,), %rax

disassembler now displays:

	67 48 8b 04 25 11 22 33 ff 	mov -0xccddef(,%eiz,1),%rax

instead of

	67 48 8b 04 25 11 22 33 ff 	addr32 mov 0xffffffffff332211,%rax

gas/

	* testsuite/gas/i386/evex-no-scale-64.d: Updated.
	* testsuite/gas/i386/x86-64-addr32-intel.d: Likewise.
	* testsuite/gas/i386/x86-64-addr32.d: Likewise.
	* testsuite/gas/i386/ilp32/x86-64-addr32-intel.d: Likewise.
	* testsuite/gas/i386/ilp32/x86-64-addr32.d: Likewise.
	* testsuite/gas/i386/x86-64-addr32.s: Add %eiz tests.

opcodes/

	* i386-dis.c (OP_E_memory): In 64-bit mode, display eiz for
	address with the addr32 prefix and without base nor index
	registers.
This commit is contained in:
H.J. Lu 2018-08-14 09:55:43 -07:00
parent 26fb3983d7
commit 1bc60e5624
9 changed files with 63 additions and 21 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

9
gas/ChangeLog
View File

@ -1,3 +1,12 @@
2018-08-14 H.J. Lu <hongjiu.lu@intel.com>
* testsuite/gas/i386/evex-no-scale-64.d: Updated.
* testsuite/gas/i386/x86-64-addr32-intel.d: Likewise.
* testsuite/gas/i386/x86-64-addr32.d: Likewise.
* testsuite/gas/i386/ilp32/x86-64-addr32-intel.d: Likewise.
* testsuite/gas/i386/ilp32/x86-64-addr32.d: Likewise.
* testsuite/gas/i386/x86-64-addr32.s: Add %eiz tests.
2018-08-14 Robert Yang <liezhi.yang@windriver.com> 2018-08-14 Robert Yang <liezhi.yang@windriver.com>
* as.c (main): Improve check for input file matching output file. * as.c (main): Improve check for input file matching output file.

2
gas/testsuite/gas/i386/evex-no-scale-64.d
View File

@ -10,5 +10,5 @@ Disassembly of section .text:
+[a-f0-9]+: 62 f1 7c 48 28 04 05 40 00 00 00 vmovaps 0x40\(,%rax,1\),%zmm0 +[a-f0-9]+: 62 f1 7c 48 28 04 05 40 00 00 00 vmovaps 0x40\(,%rax,1\),%zmm0
+[a-f0-9]+: 62 f1 7c 48 28 04 25 40 00 00 00 vmovaps 0x40,%zmm0 +[a-f0-9]+: 62 f1 7c 48 28 04 25 40 00 00 00 vmovaps 0x40,%zmm0
+[a-f0-9]+: 67 62 f1 7c 48 28 04 05 40 00 00 00 vmovaps 0x40\(,%eax,1\),%zmm0 +[a-f0-9]+: 67 62 f1 7c 48 28 04 05 40 00 00 00 vmovaps 0x40\(,%eax,1\),%zmm0
+[a-f0-9]+: 67 62 f1 7c 48 28 04 25 40 00 00 00 addr32 vmovaps 0x40,%zmm0 +[a-f0-9]+: 67 62 f1 7c 48 28 04 25 40 00 00 00 vmovaps 0x40\(,%eiz,1\),%zmm0
+[a-f0-9]+: 62 f1 7c 48 28 04 25 40 00 00 00 vmovaps 0x40,%zmm0 +[a-f0-9]+: 62 f1 7c 48 28 04 25 40 00 00 00 vmovaps 0x40,%zmm0

8
gas/testsuite/gas/i386/ilp32/x86-64-addr32-intel.d
View File

@ -11,17 +11,19 @@ Disassembly of section .text:
[ ]*[a-f0-9]+: 67 48 8d 80 00 00 00 00[ ]+lea[ ]+rax,\[eax\+0x0\].* [ ]*[a-f0-9]+: 67 48 8d 80 00 00 00 00[ ]+lea[ ]+rax,\[eax\+0x0\].*
[ ]*[a-f0-9]+: 67 49 8d 80 00 00 00 00[ ]+lea[ ]+rax,\[r8d\+0x0\].* [ ]*[a-f0-9]+: 67 49 8d 80 00 00 00 00[ ]+lea[ ]+rax,\[r8d\+0x0\].*
[ ]*[a-f0-9]+: 67 48 8d 05 00 00 00 00[ ]+lea[ ]+rax,\[eip\+0x0\].* [ ]*[a-f0-9]+: 67 48 8d 05 00 00 00 00[ ]+lea[ ]+rax,\[eip\+0x0\].*
[ ]*[a-f0-9]+: 67 48 8d 04 25 00 00 00 00 addr32 lea rax,ds:0x0.* [ ]*[a-f0-9]+: 67 48 8d 04 25 00 00 00 00 lea[ ]+rax,\[eiz\*1\+0x0\].*
[ ]*[a-f0-9]+: 67 a0 98 08 60 00 addr32 mov al,ds:0x600898 [ ]*[a-f0-9]+: 67 a0 98 08 60 00 addr32 mov al,ds:0x600898
[ ]*[a-f0-9]+: 67 66 a1 98 08 60 00 addr32 mov ax,ds:0x600898 [ ]*[a-f0-9]+: 67 66 a1 98 08 60 00 addr32 mov ax,ds:0x600898
[ ]*[a-f0-9]+: 67 a1 98 08 60 00 addr32 mov eax,ds:0x600898 [ ]*[a-f0-9]+: 67 a1 98 08 60 00 addr32 mov eax,ds:0x600898
[ ]*[a-f0-9]+: 67 48 a1 98 08 60 00 addr32 mov rax,ds:0x600898 [ ]*[a-f0-9]+: 67 48 a1 98 08 60 00 addr32 mov rax,ds:0x600898
[ ]*[a-f0-9]+: 67 48 a1 98 08 80 00 addr32 mov rax,ds:0x800898 [ ]*[a-f0-9]+: 67 48 a1 98 08 80 00 addr32 mov rax,ds:0x800898
[ ]*[a-f0-9]+: 67 48 8b 1c 25 98 08 80 00 addr32 mov rbx,QWORD PTR ds:0x800898 [ ]*[a-f0-9]+: 67 48 8b 1c 25 98 08 80 00 mov[ ]+rbx,QWORD PTR \[eiz\*1\+0x800898\]
[ ]*[a-f0-9]+: 67 a2 98 08 60 00 addr32 mov ds:0x600898,al [ ]*[a-f0-9]+: 67 a2 98 08 60 00 addr32 mov ds:0x600898,al
[ ]*[a-f0-9]+: 67 66 a3 98 08 60 00 addr32 mov ds:0x600898,ax [ ]*[a-f0-9]+: 67 66 a3 98 08 60 00 addr32 mov ds:0x600898,ax
[ ]*[a-f0-9]+: 67 a3 98 08 60 00 addr32 mov ds:0x600898,eax [ ]*[a-f0-9]+: 67 a3 98 08 60 00 addr32 mov ds:0x600898,eax
[ ]*[a-f0-9]+: 67 48 a3 98 08 60 00 addr32 mov ds:0x600898,rax [ ]*[a-f0-9]+: 67 48 a3 98 08 60 00 addr32 mov ds:0x600898,rax
[ ]*[a-f0-9]+: 67 48 a3 98 08 80 00 addr32 mov ds:0x800898,rax [ ]*[a-f0-9]+: 67 48 a3 98 08 80 00 addr32 mov ds:0x800898,rax
[ ]*[a-f0-9]+: 67 48 89 1c 25 98 08 80 00 addr32 mov QWORD PTR ds:0x800898,rbx [ ]*[a-f0-9]+: 67 48 89 1c 25 98 08 80 00 mov[ ]+QWORD PTR \[eiz\*1\+0x800898\],rbx
[ ]*[a-f0-9]+: 67 89 04 25 11 22 33 ff mov[ ]+DWORD PTR \[eiz\*1-0xccddef\],eax
[ ]*[a-f0-9]+: 67 89 04 65 11 22 33 ff mov[ ]+DWORD PTR \[eiz\*2-0xccddef\],eax
#pass #pass

8
gas/testsuite/gas/i386/ilp32/x86-64-addr32.d
View File

@ -11,17 +11,19 @@ Disassembly of section .text:
[ ]*[a-f0-9]+: 67 48 8d 80 00 00 00 00[ ]+lea[ ]+0x0\(%eax\),%rax.* [ ]*[a-f0-9]+: 67 48 8d 80 00 00 00 00[ ]+lea[ ]+0x0\(%eax\),%rax.*
[ ]*[a-f0-9]+: 67 49 8d 80 00 00 00 00[ ]+lea[ ]+0x0\(%r8d\),%rax.* [ ]*[a-f0-9]+: 67 49 8d 80 00 00 00 00[ ]+lea[ ]+0x0\(%r8d\),%rax.*
[ ]*[a-f0-9]+: 67 48 8d 05 00 00 00 00[ ]+lea[ ]+0x0\(%eip\),%rax.* [ ]*[a-f0-9]+: 67 48 8d 05 00 00 00 00[ ]+lea[ ]+0x0\(%eip\),%rax.*
[ ]*[a-f0-9]+: 67 48 8d 04 25 00 00 00 00[ ]+addr32 lea[ ]+0x0,%rax.* [ ]*[a-f0-9]+: 67 48 8d 04 25 00 00 00 00[ ]+lea[ ]+0x0\(,%eiz,1\),%rax.*
[ ]*[a-f0-9]+: 67 a0 98 08 60 00 addr32 mov 0x600898,%al [ ]*[a-f0-9]+: 67 a0 98 08 60 00 addr32 mov 0x600898,%al
[ ]*[a-f0-9]+: 67 66 a1 98 08 60 00 addr32 mov 0x600898,%ax [ ]*[a-f0-9]+: 67 66 a1 98 08 60 00 addr32 mov 0x600898,%ax
[ ]*[a-f0-9]+: 67 a1 98 08 60 00 addr32 mov 0x600898,%eax [ ]*[a-f0-9]+: 67 a1 98 08 60 00 addr32 mov 0x600898,%eax
[ ]*[a-f0-9]+: 67 48 a1 98 08 60 00 addr32 mov 0x600898,%rax [ ]*[a-f0-9]+: 67 48 a1 98 08 60 00 addr32 mov 0x600898,%rax
[ ]*[a-f0-9]+: 67 48 a1 98 08 80 00 addr32 mov 0x800898,%rax [ ]*[a-f0-9]+: 67 48 a1 98 08 80 00 addr32 mov 0x800898,%rax
[ ]*[a-f0-9]+: 67 48 8b 1c 25 98 08 80 00 addr32 mov 0x800898,%rbx [ ]*[a-f0-9]+: 67 48 8b 1c 25 98 08 80 00 mov[ ]+0x800898\(,%eiz,1\),%rbx
[ ]*[a-f0-9]+: 67 a2 98 08 60 00 addr32 mov %al,0x600898 [ ]*[a-f0-9]+: 67 a2 98 08 60 00 addr32 mov %al,0x600898
[ ]*[a-f0-9]+: 67 66 a3 98 08 60 00 addr32 mov %ax,0x600898 [ ]*[a-f0-9]+: 67 66 a3 98 08 60 00 addr32 mov %ax,0x600898
[ ]*[a-f0-9]+: 67 a3 98 08 60 00 addr32 mov %eax,0x600898 [ ]*[a-f0-9]+: 67 a3 98 08 60 00 addr32 mov %eax,0x600898
[ ]*[a-f0-9]+: 67 48 a3 98 08 60 00 addr32 mov %rax,0x600898 [ ]*[a-f0-9]+: 67 48 a3 98 08 60 00 addr32 mov %rax,0x600898
[ ]*[a-f0-9]+: 67 48 a3 98 08 80 00 addr32 mov %rax,0x800898 [ ]*[a-f0-9]+: 67 48 a3 98 08 80 00 addr32 mov %rax,0x800898
[ ]*[a-f0-9]+: 67 48 89 1c 25 98 08 80 00 addr32 mov %rbx,0x800898 [ ]*[a-f0-9]+: 67 48 89 1c 25 98 08 80 00 mov[ ]+%rbx,0x800898\(,%eiz,1\)
[ ]*[a-f0-9]+: 67 89 04 25 11 22 33 ff mov[ ]+%eax,-0xccddef\(,%eiz,1\)
[ ]*[a-f0-9]+: 67 89 04 65 11 22 33 ff mov[ ]+%eax,-0xccddef\(,%eiz,2\)
#pass #pass

8
gas/testsuite/gas/i386/x86-64-addr32-intel.d
View File

@ -11,17 +11,19 @@ Disassembly of section .text:
[ ]*[a-f0-9]+: 67 48 8d 80 00 00 00 00[ ]+lea[ ]+rax,\[eax\+0x0\].* [ ]*[a-f0-9]+: 67 48 8d 80 00 00 00 00[ ]+lea[ ]+rax,\[eax\+0x0\].*
[ ]*[a-f0-9]+: 67 49 8d 80 00 00 00 00[ ]+lea[ ]+rax,\[r8d\+0x0\].* [ ]*[a-f0-9]+: 67 49 8d 80 00 00 00 00[ ]+lea[ ]+rax,\[r8d\+0x0\].*
[ ]*[a-f0-9]+: 67 48 8d 05 00 00 00 00[ ]+lea[ ]+rax,\[eip\+0x0\].* [ ]*[a-f0-9]+: 67 48 8d 05 00 00 00 00[ ]+lea[ ]+rax,\[eip\+0x0\].*
[ ]*[a-f0-9]+: 67 48 8d 04 25 00 00 00 00 addr32 lea rax,ds:0x0.* [ ]*[a-f0-9]+: 67 48 8d 04 25 00 00 00 00 lea[ ]+rax,\[eiz\*1\+0x0\].*
[ ]*[a-f0-9]+: 67 a0 98 08 60 00 addr32 mov al,ds:0x600898 [ ]*[a-f0-9]+: 67 a0 98 08 60 00 addr32 mov al,ds:0x600898
[ ]*[a-f0-9]+: 67 66 a1 98 08 60 00 addr32 mov ax,ds:0x600898 [ ]*[a-f0-9]+: 67 66 a1 98 08 60 00 addr32 mov ax,ds:0x600898
[ ]*[a-f0-9]+: 67 a1 98 08 60 00 addr32 mov eax,ds:0x600898 [ ]*[a-f0-9]+: 67 a1 98 08 60 00 addr32 mov eax,ds:0x600898
[ ]*[a-f0-9]+: 67 48 a1 98 08 60 00 addr32 mov rax,ds:0x600898 [ ]*[a-f0-9]+: 67 48 a1 98 08 60 00 addr32 mov rax,ds:0x600898
[ ]*[a-f0-9]+: 67 48 a1 98 08 80 00 addr32 mov rax,ds:0x800898 [ ]*[a-f0-9]+: 67 48 a1 98 08 80 00 addr32 mov rax,ds:0x800898
[ ]*[a-f0-9]+: 67 48 8b 1c 25 98 08 80 00 addr32 mov rbx,QWORD PTR ds:0x800898 [ ]*[a-f0-9]+: 67 48 8b 1c 25 98 08 80 00 mov[ ]+rbx,QWORD PTR \[eiz\*1\+0x800898\]
[ ]*[a-f0-9]+: 67 a2 98 08 60 00 addr32 mov ds:0x600898,al [ ]*[a-f0-9]+: 67 a2 98 08 60 00 addr32 mov ds:0x600898,al
[ ]*[a-f0-9]+: 67 66 a3 98 08 60 00 addr32 mov ds:0x600898,ax [ ]*[a-f0-9]+: 67 66 a3 98 08 60 00 addr32 mov ds:0x600898,ax
[ ]*[a-f0-9]+: 67 a3 98 08 60 00 addr32 mov ds:0x600898,eax [ ]*[a-f0-9]+: 67 a3 98 08 60 00 addr32 mov ds:0x600898,eax
[ ]*[a-f0-9]+: 67 48 a3 98 08 60 00 addr32 mov ds:0x600898,rax [ ]*[a-f0-9]+: 67 48 a3 98 08 60 00 addr32 mov ds:0x600898,rax
[ ]*[a-f0-9]+: 67 48 a3 98 08 80 00 addr32 mov ds:0x800898,rax [ ]*[a-f0-9]+: 67 48 a3 98 08 80 00 addr32 mov ds:0x800898,rax
[ ]*[a-f0-9]+: 67 48 89 1c 25 98 08 80 00 addr32 mov QWORD PTR ds:0x800898,rbx [ ]*[a-f0-9]+: 67 48 89 1c 25 98 08 80 00 mov[ ]+QWORD PTR \[eiz\*1\+0x800898\],rbx
[ ]*[a-f0-9]+: 67 89 04 25 11 22 33 ff mov[ ]+DWORD PTR \[eiz\*1-0xccddef\],eax
[ ]*[a-f0-9]+: 67 89 04 65 11 22 33 ff mov[ ]+DWORD PTR \[eiz\*2-0xccddef\],eax
#pass #pass

8
gas/testsuite/gas/i386/x86-64-addr32.d
View File

@ -10,17 +10,19 @@ Disassembly of section .text:
[ ]*[a-f0-9]+: 67 48 8d 80 00 00 00 00[ ]+lea[ ]+0x0\(%eax\),%rax.* [ ]*[a-f0-9]+: 67 48 8d 80 00 00 00 00[ ]+lea[ ]+0x0\(%eax\),%rax.*
[ ]*[a-f0-9]+: 67 49 8d 80 00 00 00 00[ ]+lea[ ]+0x0\(%r8d\),%rax.* [ ]*[a-f0-9]+: 67 49 8d 80 00 00 00 00[ ]+lea[ ]+0x0\(%r8d\),%rax.*
[ ]*[a-f0-9]+: 67 48 8d 05 00 00 00 00[ ]+lea[ ]+0x0\(%eip\),%rax.* [ ]*[a-f0-9]+: 67 48 8d 05 00 00 00 00[ ]+lea[ ]+0x0\(%eip\),%rax.*
[ ]*[a-f0-9]+: 67 48 8d 04 25 00 00 00 00[ ]+addr32 lea[ ]+0x0,%rax.* [ ]*[a-f0-9]+: 67 48 8d 04 25 00 00 00 00[ ]+lea[ ]+0x0\(,%eiz,1\),%rax.*
[ ]*[a-f0-9]+: 67 a0 98 08 60 00 addr32 mov 0x600898,%al [ ]*[a-f0-9]+: 67 a0 98 08 60 00 addr32 mov 0x600898,%al
[ ]*[a-f0-9]+: 67 66 a1 98 08 60 00 addr32 mov 0x600898,%ax [ ]*[a-f0-9]+: 67 66 a1 98 08 60 00 addr32 mov 0x600898,%ax
[ ]*[a-f0-9]+: 67 a1 98 08 60 00 addr32 mov 0x600898,%eax [ ]*[a-f0-9]+: 67 a1 98 08 60 00 addr32 mov 0x600898,%eax
[ ]*[a-f0-9]+: 67 48 a1 98 08 60 00 addr32 mov 0x600898,%rax [ ]*[a-f0-9]+: 67 48 a1 98 08 60 00 addr32 mov 0x600898,%rax
[ ]*[a-f0-9]+: 67 48 a1 98 08 80 00 addr32 mov 0x800898,%rax [ ]*[a-f0-9]+: 67 48 a1 98 08 80 00 addr32 mov 0x800898,%rax
[ ]*[a-f0-9]+: 67 48 8b 1c 25 98 08 80 00 addr32 mov 0x800898,%rbx [ ]*[a-f0-9]+: 67 48 8b 1c 25 98 08 80 00 mov[ ]+0x800898\(,%eiz,1\),%rbx
[ ]*[a-f0-9]+: 67 a2 98 08 60 00 addr32 mov %al,0x600898 [ ]*[a-f0-9]+: 67 a2 98 08 60 00 addr32 mov %al,0x600898
[ ]*[a-f0-9]+: 67 66 a3 98 08 60 00 addr32 mov %ax,0x600898 [ ]*[a-f0-9]+: 67 66 a3 98 08 60 00 addr32 mov %ax,0x600898
[ ]*[a-f0-9]+: 67 a3 98 08 60 00 addr32 mov %eax,0x600898 [ ]*[a-f0-9]+: 67 a3 98 08 60 00 addr32 mov %eax,0x600898
[ ]*[a-f0-9]+: 67 48 a3 98 08 60 00 addr32 mov %rax,0x600898 [ ]*[a-f0-9]+: 67 48 a3 98 08 60 00 addr32 mov %rax,0x600898
[ ]*[a-f0-9]+: 67 48 a3 98 08 80 00 addr32 mov %rax,0x800898 [ ]*[a-f0-9]+: 67 48 a3 98 08 80 00 addr32 mov %rax,0x800898
[ ]*[a-f0-9]+: 67 48 89 1c 25 98 08 80 00 addr32 mov %rbx,0x800898 [ ]*[a-f0-9]+: 67 48 89 1c 25 98 08 80 00 mov[ ]+%rbx,0x800898\(,%eiz,1\)
[ ]*[a-f0-9]+: 67 89 04 25 11 22 33 ff mov[ ]+%eax,-0xccddef\(,%eiz,1\)
[ ]*[a-f0-9]+: 67 89 04 65 11 22 33 ff mov[ ]+%eax,-0xccddef\(,%eiz,2\)
#pass #pass

5
gas/testsuite/gas/i386/x86-64-addr32.s
View File

@ -1,4 +1,5 @@
.text .text
.allow_index_reg
lea symbol(%eax), %rax lea symbol(%eax), %rax
lea symbol(%r8d), %rax lea symbol(%r8d), %rax
lea symbol(%eip), %rax lea symbol(%eip), %rax
@ -15,3 +16,5 @@
addr32 mov %rax,0x600898 addr32 mov %rax,0x600898
addr32 mov %rax,0x800898 addr32 mov %rax,0x800898
addr32 mov %rbx,0x800898 addr32 mov %rbx,0x800898
mov %eax, -0xccddef(,%eiz,)
mov %eax, -0xccddef(,%eiz,2)

6
opcodes/ChangeLog
View File

@ -1,3 +1,9 @@
2018-08-14 H.J. Lu <hongjiu.lu@intel.com>
* i386-dis.c (OP_E_memory): In 64-bit mode, display eiz for
address with the addr32 prefix and without base nor index
registers.
2018-08-11 H.J. Lu <hongjiu.lu@intel.com> 2018-08-11 H.J. Lu <hongjiu.lu@intel.com>
* i386-gen.c (cpu_flag_init): Add CpuCMOV and CpuFXSR to * i386-gen.c (cpu_flag_init): Add CpuCMOV and CpuFXSR to

30
opcodes/i386-dis.c
View File

@ -15337,6 +15337,7 @@ OP_E_memory (int bytemode, int sizeflag)
int havebase; int havebase;
int haveindex; int haveindex;
int needindex; int needindex;
int needaddr32;
int base, rbase; int base, rbase;
int vindex = 0; int vindex = 0;
int scale = 0; int scale = 0;
@ -15433,12 +15434,27 @@ OP_E_memory (int bytemode, int sizeflag)
break; break;
} }
/* In 32bit mode, we need index register to tell [offset] from needindex = 0;
[eiz*1 + offset]. */ needaddr32 = 0;
needindex = (havesib if (havesib
&& !havebase && !havebase
&& !haveindex && !haveindex
&& address_mode == mode_32bit); && address_mode != mode_16bit)
{
if (address_mode == mode_64bit)
{
/* Display eiz instead of addr32. */
needindex = addr32flag;
needaddr32 = 1;
}
else
{
/* In 32-bit mode, we need index register to tell [offset]
from [eiz*1 + offset]. */
needindex = 1;
}
}
havedisp = (havebase havedisp = (havebase
|| needindex || needindex
|| (havesib && (haveindex || scale != 0))); || (havesib && (haveindex || scale != 0)));
@ -15458,7 +15474,7 @@ OP_E_memory (int bytemode, int sizeflag)
} }
} }
if ((havebase || haveindex || riprel) if ((havebase || haveindex || needaddr32 || riprel)
&& (bytemode != v_bnd_mode) && (bytemode != v_bnd_mode)
&& (bytemode != bnd_mode) && (bytemode != bnd_mode)
&& (bytemode != bnd_swap_mode)) && (bytemode != bnd_swap_mode))